參數(shù)資料
型號(hào)： TCM4400ETQFP
廠商： Texas Instruments, Inc.
英文描述： GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT
中文描述： 的GSM / DCS的基帶和語(yǔ)音的A / D和D / A射頻接口電路
文件頁(yè)數(shù)： 47/64頁(yè)
文件大?。?/td> 888K
代理商： TCM4400ETQFP
TCM4400E
GSM/DCS BASEBAND AND VOICE A/D
AND D/A RF INTERFACE CIRCUIT
SLWS082A – JULY 1999 – REVISED MARCH 2000
47
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
baseband uplink I and Q offset registers
The baseband uplink I and Q offset registers contain the offset values for the I and Q components, respectively,
as shown in Tables 9 and 10.
Table 9. Uplink I Offset Register
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ááááááááááááááááááááá
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ULIOFF0 to ULIOFF1
: Integration bits during calibration (to minimize sensitivity to noise)
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1
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1
ULIOFF2 to ULIOFF8
: Value of the offset on I channel
RESERVD
: Reserved bits for testing purposes
R/W
: A 1 indicates a read operation; a 0 indicates a write operation.
Table 10. Uplink Q Offset Register
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ULQOFF0 to ULQOFF1: Integration bits during calibration (to minimize sensitivity to noise)
BULQOFF: BASEBAND UPLINK Q OFFSET REGISTER
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ADDRESS: 4
R/W
RESERVD
ULQOFF8
ULQOFF7
ULQOFF6
ULQOFF5
ULQOFF4
ULQOFF3
ULQOFF2
ULQOFF1
ULQOFF0
0
0
1
0
0
1/0
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ULQOFF2 to ULQOFF8: Value of the offset on Q channel
RESERVD
: Reserved bits for testing purposes
R/W
: A 1 indicates a read operation; a 0 indicates a write operation.
baseband uplink I and Q D/A conversion registers
The I and Q component values generated by the I and Q uplink D/A converter during the conversion of analog
data are written to and read from the uplink I and Q D/A converter registers as shown in Tables 11 and 12.
Table 11. Uplink I DAC Register
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RESERVD
ááááááááááááááááááááááááááá
0
RESERVD
RESERVD
RESERVD
RESERVD
RESERVD
RESERVD
RESERVD
RESERVD
RESERVD
0
<–VALUE AT RESET
0
1
1
0
1/0
R
0
R
R
0
R
0
R
R
0
R
0
R
R
0
R
0
0
0
RESERVD
: Reserved bits for testing purposes
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