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參數(shù)資料
| 型號： | TC9324F |
| 廠商： | Toshiba Corporation |
| 英文描述： | Single-Chip DTS Microcontroller (DTS-20) |
| 中文描述： | 單芯片微丘（丘- 20） |
| 文件頁數(shù)： | 73/101頁 |
| 文件大?。?/td> | 1831K |
| 代理商： | TC9324F |
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TC9324F
2002-02-08
73
1)
SIO ON Bit
The SIO ON bit switches the P5-2/SO3/SO4 and P5-3/SCK3/SCK4 pins to serial interface function
pins SO3/SO4 and SCK3/SCK4.
Setting SIO ON to 1 sets the pins to serial interface function pins; setting the bit to 0 sets the pins
as I/O port 5. When serial interface functions are set, these pins can all be controlled by the serial
interface control bits. Note, however, that the I/O port input data can still be read.
Setting pin P5-1/SI3 to serial interface functions allows the pin to be used as a serial input. The I/O
port function can be used even when the pin is set to serial interface functions. Input/output can be
set using the I/O control port and data can be input/output using the I/O data port. Therefore, when
this pin is set to serial input, it must also be set as an I/O port input.
2)
MOD Bit
The MOD bit selects the serial interface format. Setting MOD to 0 selects 3-line serial interface;
setting MOD to 1 selects 2-line serial interface.
When two-line serial interface is selected, the EDGE and SCK-INV bits (described below) are set to
0 and the Nch bit to 1.
When three-line serial interface is selected, the ACK, BUSY4, STA F/F, and STP F/F bits are
invalidated.
3)
EDGE, SCK-INV, and ENA Bits
The EDGE bit sets the serial clock (SCK3/SCK4) edge. Setting EDGE to 0 inputs serial data on the
clock rising edge and outputs serial data on the falling edge. Setting EDGE to 1 inputs serial data on
the clock falling edge, and outputs serial data on the rising edge.
The SCK-INV bit sets the shift clock’s (SCK3/SCK4) input/output waveform. The bit setting
determines whether to start the waveform from the serial clock’s H level output or from L level output.
When SCK-INV is set to 0 the shift clock waveform starts from L level output, and when the bit is set
to 1 the shift clock waveform starts from H output.
The ENA bit switches between serial operations and software control. Setting ENA to 0 selects
serial operations. Setting the bit to 1 selects software control. When ENA is set to serial operations,
the serial clock (SCK3/SCK4 pin) and serial data (SO3/SO4 pin) are input/output. When ENA is set to
software control (ENA
=
1), the serial clock is output to the SCK3/SCK4 pin and serial data to the
SO3/SO4 pin.
When 3-line serial interface is selected with the EDGE and SCK-INV bits both set to 0 or to 1,
setting the STA bit to 1 automatically resets ENA to 0, then sets it back to 1 on completion of serial
operations. When the EDGE and SCK-INV bits are set to (1, 0) or (0, 1), neither set nor reset occurs.
Therefore, with these settings, normally the ENA bit is set to 0.
When 2-line serial interface is selected, the ENA bit is set to 1 (forcibly terminate serial operations)
under the following conditions.
On a shift clock (SCK4) rising edge after the SDANG_F/F bit is detected as 1 (data output
result flag NG)
On a shift clock (SCK4) rising edge after the STP F/F bit is detected as 1 (2-line serial
interface terminated)
On a shift clock (SCK4) rising edge after the ACK bit is detected as 1 (acknowledge
detection NG)
On a shift clock (SCK4) falling edge at completion of a shift operation
Also, when 2-line serial interface is selected, the ENA bit is reset to 0 (serial operations start) under
the following conditions.
On a shift clock (SCK4) rising edge after the STA bit is detected as 1 (serial operations
start)
On a shift clock (SCK4) rising edge after the STA F/F bit is detected as 1 (2-line serial
interface terminated)
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相關代理商/技術參數(shù) |
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|---|---|
| TC9325F | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:Single-Chip DTS Microcontroller (DTS-20) |
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