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參數(shù)資料
| 型號： | TC9324F |
| 廠商： | Toshiba Corporation |
| 英文描述： | Single-Chip DTS Microcontroller (DTS-20) |
| 中文描述： | 單芯片微丘（丘- 20） |
| 文件頁數(shù)： | 10/101頁 |
| 文件大?。?/td> | 1831K |
| 代理商： | TC9324F |
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TC9324F
2002-02-08
10
Pin No.
Symbol
Pin Name
Function and Operation
Remarks
92
VCPU
CPU constant
voltage output
Constant voltage output pin for the
CPU or oscillators.
In normal mode, a constant voltage
power supply of 2.95 V (typ.) is
output; in Clock Stop mode, V
DD
is
output. Connecting a capacitor (0.1
μ
F, 10
μ
F typ.) stabilizes the power
supply.
94
X
OUT2
95
X
IN2
75 kHz crystal
oscillator pins
97
X
OUT1
98
XIN1
4.5 MHz crystal
oscillator pins
Crystal oscillator pins.
Connect a 4.5 MHz crystal (Ci
=
Co
=
30 pF typ.) to X
IN1
and X
OUT1
and a
75 kHz crystal (Ci
=
Co
=
30 pF typ.)
to X
IN2
and X
OUT2
.
Two different types of crystal
resonators (4.5 MHz and 75 kHz) can
be connected, or simply connect one
(4.5 MHz or 75 kHz). Note that if a 75
kHz crystal only is connected, X
IN1
must be fixed to GND level. If a 4.5
MHz crystal only is connected, it is not
necessary to fix the 75 kHz crystal
oscillator pins. If both 4.5 MHz and 75
kHz crystal oscillators are connected,
after a reset the CPU operates on the
4.5 MHz crystal oscillator clock. The
clock can be readily switched by
software between the CPU operating
clock and the peripheral clock.
Oscillation stops during execution of
the CKSTP instruction.
100
V
EE
LCD driver bias
voltage output pin
This is the bias voltage output pin for
the LCD driver.
39
56
76
96
V
DD1
V
DD2
V
DD3
V
DD4
41
55
72
93
99
GND1
GND2
GND3
GND4
GND5
Power supply pins
Pins used for supplying power.
In PLL On mode, the pins supply V
DD
=
4.0 to 5.5 V; in PLL Off mode, the
pins supply V
DD
=
3.5 to 5.5 V.
In backup state (when execution of
the CKSTP instruction), current
dissipation becomes low (10
μ
A max),
dropping the power supply voltage to
2.0 V.
If 3.5 V or more is applied to these
pins when the voltage is 0 V, a system
reset is applied to the device and the
program starts from address 0
(power-on reset).
Note: To operate the power-on reset,
allow 10 to 100 ms while the
device power supply voltage
rises.
VCPU
V
DD
GND
V
DD
RfXT1
ROUT1
X
IN1
X
OUT1
V
DD
RfXT2
ROUT2
X
IN2
X
OUT2
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