參數(shù)資料
型號： TC9324F
廠商： Toshiba Corporation
英文描述： Single-Chip DTS Microcontroller (DTS-20)
中文描述： 單芯片微丘（丘- 20）
文件頁數(shù)： 23/101頁
文件大?。?/td> 1831K
代理商： TC9324F
TC9324F
2002-02-08
23
φ
L1
φ
L2
φ
L3
φ
K1
φ
K2
φ
K3
OUT1
OUT2
OUT3
IN1
IN2
IN3
Page 2
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
Interrupt control
(IPOL2
I/O control 1
I/O port 1
Interrupt control
(POL2
SI02 decode data
I/O port 1
0
(POL1
IE
*
-0
-1
-2
-3
-0
-1
-2
-3
(POL1
IE
IMF
DCD0
DCD1
DCD2
DCD3
-0
-1
-2
-3
Interrupt enable flag 1
I/O control 2
I/O port 2
Interrupt enable flag 1
SI02 information data 1
I/O port 2
1
(IEF1
(IEF2
(SEF3
(EF4
-0
-1
-2
-3
-0
-1
-2
-3
(IEF1
(IEF2
(SEF3
(EF4
INF0
INF1
INF2
INF3
-0
-1
-2
-3
Interrupt enable flag 2
I/O control 3
I/O port 3
Interrupt enable flag 2
SI02 information data 2
I/O port 3
2
(EF5
(EF6
*
*
-0
-1
-2
-3
-0
-1
-2
-3
(EF5
(EF6
0
0
INF4
INF5
INF6
INF7
-0
-1
-2
-3
Interrupt latch reset 1
I/O control 4
I/O port 4
Interrupt latch 1
SI02 information data 3
I/O port 4
3
(IILR1
(IILR2
(SILR3
(ILR4
-0
-1
-2
-3
-0
-1
-2
-3
(IIL1
(IIL2
(SIIL3
(SIL4
INF8
INF9
INF10
INF11
-0
-1
-2
-3
Interrupt latch reset 2
I/O control 5
I/O port 5
Interrupt latch 2
SI02 information data 4
I/O port 5
4
(ILR5
(ILR6
*
*
-0
-1
-2
-3
-0
-1
-2
-3
(tiIL5
(SIL6
0
0
INF12
INF13
INF14
INF15
-0
-1
-2
-3
Timer-counter interrupt detect data 1
I/O control 6
I/O port 6
Timer-counter data 1
SI02 offset/check data 1
I/O port 6
5
ID0
ID1
ID2
ID3
-0
-1
-2
-3
-0
-1
-2
-3
CT0
CT1
CT2
CT3
CHK0
CHK1
CHK2
CHK3
-0
-1
-2
-3
Timer-counter interrupt detect data 2
I/O control 7
I/O port 7
Timer-counter data 2
SI02 offset/check data 2
I/O port 7
6
ID4
ID5
ID6
ID7
-0
-1
-2
-3
-0
-1
-2
-3
CT4
CT5
CT6
CT7
CHK4
CHK5
CHK6
CHK7
-0
-1
-2
-3
Timer-counter control
I/O control 8
I/O port 8
SI02 offset/check data 2
I/O port 8
7
CK SEL0
CK SEL1
GT
Reset
-0
-1
-2
-3
-0
-1
-2
-3
CHK8
CHK9
0
0
-0
-1
-2
-3
Timer reset
I/O control 9
I/O port 9
I/O port 9
8
2Reset
HOLD
PLL off
control
Reset
CKSTP
*
-0
-1
-2
-3
-0
-1
-2
-3
HOLD
INTR1
INTR2
STOP
F/F
-0
-1
-2
-3
I/O control 10
I/O port 10
Mute control
I/O port 10
9
IF counter
sprit
*
Prescaller
IN
-0
-1
-2
-3
-0
-1
-2
-3
MUTE
IO1
POL
HOLD
-0
-1
-2
-3
Oscillation control
I/O port 8 pulled-down
Unlock detect
Input port
A
(4.5 MHz)
OSC2 ON
CSEL
F CK SEL
-0
-1
-2
-3
DAL
(DATA)
→
DA
OT Count
Up
I/O port 8
pulled up
F/F
ENA
IN1
IN2
DAL
0
0
0
Data selection
DAL address/pulse counter control
Data selection
DAL address
B
CA flag
*
*
*
S1
S2
S4
S8
DA0
DA1
DA2
DA3
CA flag
0
0
0
S1
S2
S4
S8
DA0
DA1
DA2
DA3
G-register 1
General-purpdata/segment I/O control
/SEG
Data register 1
G-register 1
Data register 1
C
G0
G1
G2
G3
/SEG
/SEG
/SEG
d0
d1
d2
d3
G0
G1
G2
G3
d0
d1
d2
d3
G-register 2
Segment data 1
Data register 2
G-register 2
Data register 2
D
G4
G5
G6
G7
COM1
COM2
COM3
COM4
d4
d5
d6
d7
G4
G5
G6
G7
d4
d5
d6
d7
Test port 1
Segment data 2
Data register 3
Data register 3
E
#0
#1
#2
#3
COM1
COM2
COM3
COM4
d8
d9
d10
d11
d8
d9
d10
d11
Page
Test port 2
Segment data 3/LCD driver control
Data register 4
Page
Timer
Data register 4
F
Page 2
Page 3
*
#4
COM1
COM2
COM3
COM4
d12
d13
d14
d15
Page 2
Page 3
0
0
2 Hz F/F
10 Hz
100 Hz
500 Hz
d12
d13
d14
d15
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