參數(shù)資料
型號： TAS3204PAG
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： GREEN, PLASTIC, TQFP-64
文件頁數(shù)： 65/76頁
文件大?。?/td> 1224K
代理商： TAS3204PAG
SLES197C – APRIL 2007 – REVISED MARCH 2011
www.ti.com
Table 12-25. Extended Special Fucntion Registers (ESFR) (continued)
ESFR
MAPPED_TO
NO. OF
DIRECTION
CONNECTING
REGISTER TYPE
DESCRIPTION
BITS
BLOCK
PULSE REGISTER
Slave read: set high when MCU recognizes
1-bit asynchronous rstz
that the SLAVE_READ bit on the I2C has
positive edge triggered
C0(0)
I2c_irg_o
1
OUT
been set high.
I2C
ONE SHOT (PULSE)
Slave write: if the RCVD_DATA_STAT bit is
Reset low
set high by the I2C, MCU sets IRG high in
response.
PULSE REGISTER
I2C_MCU is set to 1 MCU assumes control
1-bit asynchronous rstz
over the I2C interface. If it is set to 0, the I2C
C0(1)
I2c_mcu_o
1
OUT
positive edge triggered
I2C
block has control. If the MCU reads a 1 on
RESET HI
slave_read, it sends an ACK to the I2C and
sets I2C_MCU high.
1-bit asynchronous rstz
Signoff assertion that volume coefficients to
C0(2)
update_volume_t
1
OUT
VOLUME
positive edge triggered
volume block are updated and execution is
Reset low
commanded
1-bit asynchronous rstz
Used during initialization to inspire
C0(3)
clr_dly_RAM_t
1
OUT
DLY_MEM
positive edge triggered
self-clearing logic activation to the delay
Reset low
RAM
PULSE REGISTER
1-bit asynchronous rstz
C0(4)
wr_t
1
OUT
positive edge triggered
I2C
I2C write pulse for slave transmit and master
ONE SHOT (PULSE)
transmit
1-bit asynchronous rstz
The I2C has two registers to which the MCU
C0(5)
I2c_sel_o
1
OUT
I2C
positive edge triggered
can write. This signal selects one of them.
PULSE REGISTER
1-bit asynchronous rstz
When DSP_HOST = 1, the MCU has direct
C0(6)
MCU_RAM_we_req_o
1
OUT
DSP
positive edge triggered
control of the RAMs and pulses this signal to
ONE SHOT (PULSE)
write to them.
When DSP_HOST is high and the MCU has
1-bit asynchronous rstz
complete control of the DSP RAMS, this bit
C0(7)
MCU_rd_req_o
1
OUT
DSP
positive edge triggered
is N/A. When DSP_HOST is low, the MCU
ONE SHOT (PULSE)
uses this bit to submit a read request to the
DSP.
C8(0)
power_down_in
1
IN
CNTL
NO REG – direct input
Power-down pin sense
1-bit asynchronous rstz
C8(2)
vol_busy_o
1
IN
VOL
positive edge triggered
Volume busy flag
Reset High
C8(3)
mem_bist_i
1
IN
membist
Direct input
Indicates chip is in firmware BIST mode
C8(4)
intr
1
IN
CNTL
Direct input
Indicates status warp IFLAG
1-bit asynchronous rstz
DSP sets this bit to notify MCU it has
C8(5)
MCU_ack_I
1
IN
DSP
positive edge triggered
captured data
Reset low
1-bit asynchronous rstz
C8(6)
clearing_dly_RAM_t
1
IN
DSP
positive edge triggered
Busy flag from Delay RAM Init clear process
Reset low
Set HIGH to signal that DSP ROM BIST
C8(7)
dsp_rom_bist_I
1
IN
DSP
NO REG – direct input
completed successfully
1-bit asynchronous rstz
D8(0)
power_down_o
1
OUT
Multiple blks
positive edge triggered
Set HIGH by the MCU. (Need more info)
Reset low
1-bit asynchronous rstz
D8(1)
watchdog_clr_t
1
OUT
CNTL
positive edge triggered
Strobe to the watchdog timer logic
Reset low
1-bit asynchronous rstz
Asserted to provide direct delay memory
D8(2)
slave_mode_t
1
OUT
DLY_MEM
positive edge triggered
access to the host (MCU)
Reset low
1-bit asynchronous rstz
Write assertion to delay memory during host
D8(3)
addr_wr_t
1
OUT
DLY_MEM
positive edge triggered
control configuration
Reset low
1-bit asynchronous rstz
Write enable signal to the audio DSP
D8(4)
MCU_wr_en_i_t
1
OUT
DSP
positive edge triggered
coefficients and DATA RAMs
Reset low
1-bit asynchronous rstz
Sets the DSP in host mode. MCU is in
D8(5)
host_DSP_o
1
OUT
DSP
positive edge triggered
control
Reset high
68
Copyright 2007–2011, Texas Instruments Incorporated
I2C Register Map
Product Folder Link(s): TAS3204
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