參數(shù)資料
型號: TAS3204PAG
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 19/76頁
文件大小: 1224K
代理商: TAS3204PAG
TAS3204
Address
TAS3204
Address
TAS3204
Address
Acknowledge
(By TAS3204)
Acknowledge
(By TAS3204)
Acknowledge
(By TAS3204)
Acknowledge
(By TAS3204)
Acknowledge
(By TAS3204)
Acknowledge
(By TAS3204)
Acknowledge
(By TAS3204)
Data
(By TAS3204)
TAS3204
Subaddress
(By Master)
TAS3204
Subaddress
(By Master)
Data
(By TAS3204)
Acknowledge
(By TAS3204)
SLES197C – APRIL 2007 – REVISED MARCH 2011
www.ti.com
Figure 8-1. I2C Subaddress Access Protocol
8.2
I
2C Master Interface
IIn the master mode, the I2C bus is used to:.
Load the program and coefficient data
MCU program memory
MCU extended memory
Audio DSP core program memory
Audio DSP core coefficient memory
Audio DSP core data memory
The TAS3204, when operating as an I2C master, can execute a complete download of any internal
memory or any section of any internal memory without requiring any wait states.
When the TAS3204 operates as an I2C master, the TAS3204 generates a repeated start without an
intervening stop command while downloading program and memory data from EEPROM. When a
repeated start is sent to the EEPROM in read mode, the EEPROM enters a sequential read mode to
transfer large blocks of data quickly.
The first action of the TAS3204 as master is to transmit a start condition along with the device address of
the I2C EEPROM with the read/write bit cleared (0) to indicate a write. The EEPROM acknowledges the
address byte, and the TAS3204 sends a subaddress byte, which the EEPROM acknowledges. Most
EEPROMs have at least 2-byte addresses and acknowledge as many as are appropriate. At this point, the
EEPROM sends a last acknowledge and becomes a slave transmitter. The TAS3204 acknowledges each
byte repeatedly to continue reading each data byte that is stored in memory.
The memory load information starts with reading the header and data information that starts at
subaddress 0 of the EEPROM. This information must then be stored in sequential memory addresses with
no intervening gaps. The data blocks are contiguous blocks of data that immediately follow the header
locations.
26
Copyright 2007–2011, Texas Instruments Incorporated
I2C Control Interface
Product Folder Link(s): TAS3204
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