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SLES197C – APRIL 2007 – REVISED MARCH 2011
Table 8-1. TAS3204 Master I2C Memory Block Structures (continued)
STARTING
DATA BLOCK FORMAT
SIZE
NOTES
BYTE
0x00
N + 12
4 Bytes
Repeated checksum bytes 2 through N + 11
Checksum code MS Byte
Checksum code LS Byte
Data Block for Audio DSP Core Coefficient Memory (Following 12-Byte Header)
Data byte 1 (LS byte)
Coefficient word 1 (valid data in Bit 27–Bit 0) Bit 7–Bit 0
Data byte 2
Bit 15–Bit 8
12
4 bytes
Data byte 3
Bit 23–Bit 16
Data byte 4 (MS byte)
Bit 31–Bit 24
Data byte 5
Data byte 6
16
4 bytes
Coefficient word 2
Data byte 7
Data byte 8
Data byte 4×(Z – 1) + 1
Data byte 4×(Z – 1) + 2
N + 8
4 bytes
Coefficient word Z
Data byte 4×(Z – 1) + 3
Data byte 4×(Z – 1) + 4 = N
0x00
N + 12
4 bytes
Repeated checksum bytes 2 through N + 11
Checksum code MS byte
Checksum code LS byte
Data Block for Audio DSP Core Data Memory (Following 12-Byte Header)
Data byte 1 (LS byte)
Data word 1 Bit 7–Bit 0
Data byte 2
Bit 15–Bit 8
Data byte 3
Bit 23–Bit 16
12
6 bytes
Data byte 4
Bit 31–Bit 24
Data byte 5
Bit 39–Bit 32
Data byte 6 (MS byte)
Bit 47–Bit 40
Data byte 7
Data byte 8
Data byte 9
18
6 bytes
Data 2
Data byte 10
Data byte 11
Data byte 12
Data byte 6×(Z – 1) + 1
Data byte 6×(Z – 1) + 2
Data byte 6×(Z – 1) + 3
N + 6
6 bytes
Data Z
Data byte 6×(Z – 1) + 4
Data byte 6×(Z – 1) + 5
Data byte 6×(Z – 1) + 6 = N
Copyright 2007–2011, Texas Instruments Incorporated
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I2C Control Interface