
SLES197C – APRIL 2007 – REVISED MARCH 2011
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1
Introduction
.............................................. 1 11.1
Absolute Maximum Ratings
........................
391.1
Features
..............................................
111.2
Package Dissipation Ratings
.......................
391.2
Applications
..........................................
111.3
Recommended Operating Conditions
1.3
Description
...........................................
211.4
Electrical Characteristics
...........................
401.4
Ordering Information
.................................
311.5
Audio Specifications
................................
402
Physical Characteristics
............................... 5 11.6
Timing Characteristics
..............................
432.1
Terminal Assignments
...............................
511.7
Master Clock
........................................
432.2
Terminal Descriptions
................................
611.8
Serial Audio Port, Slave Mode
3
TAS3204 Clocking System
............................ 8 11.9
Serial Audio Port Master Mode Signals (TAS3204)
3.1
Core Clock Management
............................
8......................................................
4511.10
Pin-Related Characteristics of the SDA and SCL
3.2
SAP Clock Management
.............................
9I/O Stages for F/S-Mode I2C-Bus Devices
4
Digital Audio Interface
................................ 11 11.11
Bus-Related Characteristics of the SDA and SCL
4.1
Serial Audio Port (SAP)
............................
11I/O Stages for F/S-Mode I2C-Bus Devices
5
Analog Audio Interface
............................... 17 11.12
Reset Timing
......................................
485.1
Analog to Digital Converters ADCs
12
I
2C Register Map
....................................... 49 5.2
Digital to Analog Converters DACs
12.1
Clock Control Register (0x00)
......................
505.3
Analog Reference System
..........................
1712.2
MCUcontroller Clock Control Register
6
Embedded MCUcontroller
........................... 18 12.3
Status Register (0x02)
..............................
516.1
MCU Addressing Modes
............................
1812.4
I2C Memory Load Control and Data Registers (0x04
6.2
Boot Up Sequence
.................................
19and 0x05)
...........................................
527
Digital Audio Processor
.............................. 20 12.5
Memory Access Registers (0x06 and 0x07)
7.1
Audio Digital Signal Processor Core
12.6
Device Version (0x08)
..............................
547.2
DAP Instructions Set
...............................
2212.7
Analog Power Down Control (0x10 and 0x11)
7.3
DAP Data Word Structure
..........................
2312.8
Analog Input Control (0x12)
........................
558
I
2C Control Interface
.................................. 25 12.9
Dynamic Element Matching (0x13)
8.1
General I2C Operations
.............................
2512.10
Current Control Select (0x14, 0x15, 0x17, 0x18)
8.2
I2C Master Interface
................................
26......................................................
568.3
I2C Slave Mode Operation
..........................
3112.11
DAC Control (0x1A, 0x1B, 0x1D)
9
TAS3204 Control Pins
................................ 35 12.12
ADC and DAC Reset (0x1E)
......................
629.1
Reset (RESET) - Power-Up Sequence
12.13
ADC Input Gain Control (0x1F)
9.2
Voltage Regulator Enable (VREG_EN)
12.14
MCLK_OUT Divider (0x21 and 0x22)
9.3
Power Down (PDN)
.................................
3512.15
Digital Cross Bar (0x30 to 0x3F)
9.4
I2C Bus Control (CS0)
..............................
3612.16
Extended Special Function Registers (ESFR) Map
9.5
Programmable I/O (GPIO)
..........................
36......................................................
6510
Algorithm and Software Development Tools for
13
Application Information
.............................. 70 TAS3204
................................................. 38 13.1
Schematics
.........................................
7011
Electrical Specifications
............................. 39 13.2
Recommended Oscillator Circuit
4
Contents
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