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參數(shù)資料
| 型號(hào)： | T7264 |
| 英文描述： | T7264 U-Interface 2B1Q Transceiver |
| 中文描述： | T7264 U型接口2B1Q收發(fā)器 |
| 文件頁數(shù)： | 19/54頁 |
| 文件大?。?/td> | 876K |
| 代理商： | T7264 |
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Data Sheet
April 1998
T7264 U-Interface 2B1Q Transceiver
Lucent Technologies Inc.
19
K2 Interface Description
(continued)
Table 13. DC Octet (Overview)
Table 14. DC Octet (Functions)
Octet
DC
Octet #
8
DO/DI
DI
Bit 1
ccrc
Bit 2
istp
Bit 3
lpbk
Bit 4
afrst
Bit 5
ldea
Bit 6
1
Bit 7
sksi
Bit 8
xpcy
Octet
DC
Bit #
1
Symbol
ccrc
Name/Function
Corrupt Cyclic Redundancy Check.
This bit is used to corrupt the crc information
transmitted by the transceiver to the U-interface.
0—Corrupt crc generation as long as bit is low.
1—Generate correct crc (normal).
Initiate Start-Up.
This bit is used to notify the transceiver of an activation request.
Should be set to a 1 during loopback. If xact = 1, istp is ignored; if xact = 0:
0—Initiate start-up (activation request).
1—Reset state (transceiver inactive).
Local Loopback.
0—Loopback.
1—Normal.
Loop back the complete 160 kbits/s U-interface bit stream at the analog output. Loop-
back turns off echo canceler and reconfigures the descrambler. Device should be re-
set and line disconnected before loopback test; istp should be set to a 1 during
loopback.
Adaptive Filter Reset.
0—Normal.
1—Reset.
2B+D and UM set equal to 1 on DO. Reset halts loop transmission and clears the
transceiver's adaptive filter coefficients, overriding all other transceiver control sig-
nals. This provides the same functionality as the RESET pin on the T7264, except F
to MTC synchronization (LT) is not lost.
Local Deactivation.
0 — Normal.
1 — Deactivate. DO 2B+D and UM set equal to 1.
Upon receiving ldea = 1 from the system device, the transceiver will save adaptive fil-
ter coefficients. In the LT, the device sends three or four U superframes of dea = 0,
then ceases transmission and enters the idle state. In the NT, the device deactivates
upon signal loss and enters the idle state. In the NT, ldea should be set before the loss
of signal (on second dea = 0) and held until xact goes low for proper deactivation.
Reserved.
For normal operation, this bit must be set to 1.
System-to-K2.
This bit may be set high or low without affecting the state of the trans-
ceiver. sksi is reflected back from the T7264 across the K2 interface by means of the
rsksi bit.
Transparency.
0—Transparent 2B+D.
1—LT mode 2B+D = 0 transmitted across the U-interface.
1—NT mode 2B+D = 1 transmitted across the U-interface.
This bit only affects the data transmitted on the U-interface. The U-to-K2 interface al-
ways remains transparent after start-up.
DC
2
istp
DC
3
lpbk
DC
4
afrst
DC
5
ldea
DC
DC
6
7
—
sksi
DC
8
xpcy
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