參數(shù)資料
型號： ST72321BM
廠商： 意法半導體
英文描述： 80-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE(具有ICP,IAP,Nested Interrupt,TLI,ROP的8位MCU)
中文描述： 80引腳8位微控制器32至60,000閃存/ ROM，ADC的，5個定時器，SPI和SCI的I2C接口（具有比較方案，國際檢察官聯(lián)合會，嵌套中斷，中華語文研習所，人事登記的8位微控制器）
文件頁數(shù)： 156/178頁
文件大小： 3121K
代理商： ST72321BM
ST72F321M, ST72321BM
156/178
CONTROL PIN CHARACTERISTICS
(Cont’d)
Figure 86.
RESET pin
protection
when LVD is enabled.
1)2)3)4)
Figure 87. RESET pin
protection
when LVD is disabled.
1)
Note 1:
– The reset network protects the device against parasitic resets.
– The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the
device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
– Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin can go
below the V
IL
max. level specified in
section 11.9.1 on page 155
. Otherwise the reset will not be taken into account
internally.
– Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user must en-
sure that the current sunk on the RESET pin is less than the absolute maximum value specified for I
INJ(RESET)
in
section 11.2.2 on page 135
.
Note 2:
When the LVD is enabled, it is recommended not to connect a pull-up resistor or capacitor. A 10nF pull-down
capacitor is required to filter noise on the reset line.
Note 3:
In case a capacitive power supply is used, it is recommended to connect a 1M
pull-down resistor to the RESET
pin to discharge any residual voltage induced by the capacitive effect of the
power supply (this will add 5μA to the power
consumption of the MCU).
Note 4:
Tips when using the LVD:
– 1. Check that all recommendations related to reset circuit have been applied (see notes above).
– 2. Check that the power supply is properly decoupled (100nF + 10μF close to the MCU). Refer to AN1709 and
AN2017. If this cannot be done, it is recommended to put a 100nF + 1M
pull-down on the RESET pin.
– 3. The capacitors connected on the RESET pin and also the power supply are key to avoid any start-up marginality.
In most cases, steps 1 and 2 above are sufficient for a robust solution. Otherwise: replace 10nF pull-down on the
RESET pin with a 5μF to 20μF capacitor.
0.01
μ
F
ST72XXX
PULSE
GENERATOR
Filter
R
ON
V
DD
WATCHDOG
LVD RESET
INTERNAL
RESET
RESET
EXTERNAL
Required
1M
Optional
(note 3)
0.01
μ
F
0.01
μ
F
V
DD
EXTERNAL
RESET
CIRCUIT
USER
V
DD
4.7k
Required
Recommended for EMC
ST72XXX
PULSE
GENERATOR
Filter
R
ON
V
DD
WATCHDOG
INTERNAL
RESET
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