參數(shù)資料
型號: ST16C2552
廠商: Exar Corporation
英文描述: Dual UART with 16-Byte Transmit and Receive FIFO(雙通用異步接收器/發(fā)送器(帶16字節(jié)接收和發(fā)送先進先出))
中文描述: 雙UART),16字節(jié)的傳輸和接收FIFO(雙通用異步接收器/發(fā)送器(帶16字節(jié)接收和發(fā)送先進先出)
文件頁數(shù): 4/32頁
文件大?。?/td> 409K
代理商: ST16C2552
ST16C2552
4
Rev. 3.50
SYMBOL DESCRIPTION
(interrupt enable), -BAUDOUT and -RXRDY are signal functions that may
be selected by the AFR. These signal functions are described as follows:
1) OP2 - When OP2 (interrupt output enable function) is selected, the
-MF pin is a logic 1 when INT A-B is set to the three state mode (disabled)
or a logic 0 when INT A-B is enabled. (See MCR bit-3). A logic 1 is the
default signal condition that is available following a master reset or power-
up.
2) BAUDOUT - When BAUDOUT function is selected, the 16 X Baud
rate clock output is available at this pin.
3) RXRDY - RXRDY is primarily intended for monitoring DMA mode
1 transfers for the receive data FIFOs. A logic 0 indicates there is receive
data to read/unload, i.e., receive ready status with one or more RX
characters available in the FIFO/RHR. This pin is a logic 1 when the FIFO/
RHR is empty or when the programmed trigger level has not been
reached. This signal can also be used for single mode transfers (DMA
mode 0).
RESET
21
I
Reset. (active high) - A logic 1 on this pin will reset the internal registers
and all the outputs. The UART transmitter output and the receiver input will
be disabled during reset time. (See ST16C2552 External Reset Condi-
tions for initialization details.)
-TXRDY A/B
1,32
O
Transmit Ready A-B (active low) - These outputs provide the TX FIFO/
THR status for individual transmit channels (A-B). TXRDY is primarily
intended for monitoring DMA mode 1 transfers for the transmit data
FIFOs. An individual channels -TXRDY A-B buffer ready status is
indicated by logic 0, i.e., at least one location is empty and available in the
FIFO or THR. This pin goes to a logic 1 when there are no more empty
locations in the FIFO or THR. This signal can also be used for single mode
transfers (DMA mode 0).
VCC
33,44
Pwr
Power supply input.
XTAL1
11
I
Crystal or External Clock Input - Functions as a crystal input or as an
external clock input. A crystal can be connected between this pin and
XTAL2 to form an internal oscillator circuit. An external 1 M
resistor is
required between the XTAL1 and XTAL2 pins. Alternatively, an external
clock can be connected to this pin to provide custom data rates (see Baud
Rate Generator Programming).
Symbol
Pin
44
Signal
type
Pin Description
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