參數(shù)資料
型號(hào)： ST16C2552
廠商： Exar Corporation
英文描述： Dual UART with 16-Byte Transmit and Receive FIFO(雙通用異步接收器/發(fā)送器（帶16字節(jié)接收和發(fā)送先進(jìn)先出）)
中文描述： 雙UART），16字節(jié)的傳輸和接收FIFO（雙通用異步接收器/發(fā)送器（帶16字節(jié)接收和發(fā)送先進(jìn)先出）
文件頁(yè)數(shù)： 17/32頁(yè)
文件大?。?/td> 409K
代理商： ST16C2552
ST16C2552
17
Rev. 3.50
Table 6, INTERRUPT SOURCE TABLE
Priority
Level
[ ISR BITS ]
Bit-3 Bit-2 Bit-1 Bit-0
Source of the interrupt
1
2
2
3
4
0
0
1
0
0
1
1
1
0
0
1
0
0
1
0
0
0
0
0
0
LSR (Receiver Line Status Register)
RXRDY (Received Data Ready)
RXRDY (Receive Data time out)
TXRDY (Transmitter Holding Register Empty)
MSR (Modem Status Register)
ISR BIT-0:
Logic 0 = An interrupt is pending and the ISR contents
may be used as a pointer to the appropriate interrupt
service routine.
Logic 1 = No interrupt pending. (normal default condi-
tion)
ISR BIT 1-3: (logic 0 or cleared is the default condition)
These bits indicate the source for a pending interrupt
at interrupt priority levels 1, 2, and 3 (See Interrupt
Source Table).
ISR BIT 4-5: (logic 0 or cleared is the default condition)
Not Used - initialized to a logic 0.
ISR BIT 6-7: (logic 0 or cleared is the default condition)
These bits are set to a logic 0 when the FIFOs are not
being used in the 16C450 mode. They are set to a logic
1 when the FIFOs are enabled in the ST16C2552
mode.
Line Control Register (LCR)
The Line Control Register is used to specify the
asynchronous data communication format. The word
length, the number of stop bits, and the parity are
selected by writing the appropriate bits in this register.
LCR BIT 0-1: (logic 0 or cleared is the default condi-
tion)
These two bits specify the word length to be transmit-
ted or received.
BIT-1
BIT-0
Word length
0
0
1
1
0
1
0
1
5
6
7
8
LCR BIT-2: (logic 0 or cleared is the default condition)
The length of stop bit is specified by this bit in
conjunction with the programmed word length.
BIT-2
Word length
Stop bit
length
(Bit time(s))
0
1
1
5,6,7,8
5
6,7,8
1
1-1/2
2
LCR BIT-3:
Parity or no parity can be selected via this bit.
Logic 0 = No parity. (normal default condition)
Logic 1 = A parity bit is generated during the transmis-
sion, receiver checks the data and parity for transmis-
sion errors.
LCR BIT-4:
If the parity bit is enabled with LCR bit-3 set to a logic
1, LCR BIT-4 selects the even or odd parity format.
Logic 0 = ODD Parity is generated by forcing an odd
number of logic 1s in the transmitted data. The
相關(guān)PDF資料
PDF描述
ST16C450 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART)
ST16C450CJ44 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART)
ST16C450CP40 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART)
ST16C450CQ48 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART)
ST16C450IJ44 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST16C2552_06 制造商:EXAR 制造商全稱:EXAR 功能描述:2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
ST16C2552CJ 制造商:EXAR 功能描述:IC , Dual UART 4MBPS 5.5 44 PLCC 制造商:Exar Corporation 功能描述: 制造商:XIC 功能描述: 制造商:Exar Corporation 功能描述:UART, 44 Pin, Plastic, PLCC
ST16C2552CJ-0A-EB 功能描述:界面開發(fā)工具 Supports C2550 44 ld PLCC, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
ST16C2552CJ44 制造商:Exar Corporation 功能描述: 制造商:Exar Corporation 功能描述:UART, 44 Pin, Plastic, PLCC 制造商:EXER 功能描述:UART, 44 Pin, Plastic, PLCC 制造商:STAR 功能描述:UART, 44 Pin, Plastic, PLCC 制造商:STARTECH 功能描述:UART, 44 Pin, Plastic, PLCC
ST16C2552CJ44-F 功能描述:UART 接口集成電路 2.97V-5.5V 16B FIFO temp 0C to 70C; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*