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參數(shù)資料
| 型號： | ST16C2552 |
| 廠商： | Exar Corporation |
| 英文描述： | Dual UART with 16-Byte Transmit and Receive FIFO(雙通用異步接收器/發(fā)送器（帶16字節(jié)接收和發(fā)送先進先出）) |
| 中文描述： | 雙UART），16字節(jié)的傳輸和接收FIFO（雙通用異步接收器/發(fā)送器（帶16字節(jié)接收和發(fā)送先進先出） |
| 文件頁數(shù)： | 15/32頁 |
| 文件大?。?/td> | 409K |
| 代理商： | ST16C2552 |
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ST16C2552
15
Rev. 3.50
IER BIT-0:
In the 16C450 mode, This interrupt will be issued when
the RHR has data or is cleared when the RHR is
empty. In the FIFO mode, this interrupt will be issued
when the FIFO has reached the programmed trigger
level or is cleared when the FIFO drops below the
trigger level.
Logic 0 = Disable the receiver ready (ISR level 2,
RXRDY) interrupt. (normal default condition)
Logic 1 = Enable the RXRDY (ISR level 2) interrupt.
IER BIT-1:
In the 16C450 mode, this interrupt will be issued
whenever the THR is empty and is associated with bit-
5 in the LSR register. In the FIFO modes, this interrupt
will be issued whenever the FIFO and THR are empty
Logic 0 = Disable the Transmit Holding Register
Empty (TXRDY) interrupt. (normal default condition)
Logic 1 = Enable the TXRDY (ISR level 3) interrupt.
IER BIT-2:
This interrupt will be issued whenever an receive data
error condition exists as reflected in LSR bits 1-4.
Logic 0 = Disable the receiver line status interrupt.
(normal default condition)
Logic 1 = Enable the receiver line status interrupt.
IER BIT-3:
This interrupt will be issued whenever there is a
modem status change as reflected in MSR bits 0-3.
Logic 0 = Disable the modem status register interrupt.
(normal default condition)
Logic 1 = Enable the modem status register interrupt.
IER BIT 4-7:
Not Used - initialized to a logic 0.
FIFO Control Register (FCR)
This register is used to enable the FIFOs, clear the
FIFOs, set the receive FIFO trigger levels, and select
the DMA mode. The DMA, and FIFO modes are
defined as follows:
DMA MODE
Mode 0 Set and enable the interrupt for each single
transmit or receive operation, and is similar to the
ST16C450 mode. Transmit Ready (-TXRDY) will go to
a logic 0 when ever an empty transmit space is
available in the Transmit Holding Register (THR).
Receive Ready (-RXRDY) at the MF pin will go to a
logic 0 whenever the Receive Holding Register (RHR)
is loaded with a character and the MF register is set to
the RXRDY mode.
Mode 1 Set and enable the interrupt in a block mode
operation. The transmit interrupt is set when the
transmit FIFO is below the programmed trigger level.
-TXRDY remains a logic 0 as long as one empty FIFO
location is available. The receive interrupt is set when
the receive FIFO fills to the programmed trigger level.
However the FIFO continues to fill regardless of the
programmed level until the FIFO is full. -RXRDY at the
MF pin remains a logic 0 as long as the FIFO fill level
is above the programmed trigger level and the MF
register is set to the RXRDY mode.
FCR BIT-0:
Logic 0 = Disable the transmit and receive FIFO.
(normal default condition)
Logic 1 = Enable the transmit and receive FIFO. This
bit must be a 1 when other FCR bits are written to or
they will not be programmed.
FCR BIT-1:
Logic 0 = No FIFO receive reset. (normal default
condition)
Logic 1 = Clears the contents of the receive FIFO and
resets the FIFO counter logic (the receive shift regis-
ter is not cleared or altered). This bit will return to a
logic 0 after clearing the FIFO.
FCR BIT-2:
Logic 0 = No FIFO transmit reset. (normal default
condition)
Logic 1 = Clears the contents of the transmit FIFO and
resets the FIFO counter logic (the transmit shift regis-
ter is not cleared or altered). This bit will return to a
logic 0 after clearing the FIFO.
FCR BIT-3:
Logic 0 = Set DMA mode 0. (normal default condi-
tion)
Logic 1 = Set DMA mode 1.
Transmit operation in mode 0:
When the 2552 is in the ST16C450 mode (FIFOs
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C2552_06 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO |
| ST16C2552CJ | 制造商:EXAR 功能描述:IC , Dual UART 4MBPS 5.5 44 PLCC 制造商:Exar Corporation 功能描述: 制造商:XIC 功能描述: 制造商:Exar Corporation 功能描述:UART, 44 Pin, Plastic, PLCC |
| ST16C2552CJ-0A-EB | 功能描述:界面開發(fā)工具 Supports C2550 44 ld PLCC, ISA Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| ST16C2552CJ44 | 制造商:Exar Corporation 功能描述: 制造商:Exar Corporation 功能描述:UART, 44 Pin, Plastic, PLCC 制造商:EXER 功能描述:UART, 44 Pin, Plastic, PLCC 制造商:STAR 功能描述:UART, 44 Pin, Plastic, PLCC 制造商:STARTECH 功能描述:UART, 44 Pin, Plastic, PLCC |
| ST16C2552CJ44-F | 功能描述:UART 接口集成電路 2.97V-5.5V 16B FIFO temp 0C to 70C; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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