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| 型號(hào)： | SPAK302PV16VC |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASITC, LQFP-144 |
| 文件頁(yè)數(shù)： | 128/128頁(yè) |
| 文件大小： | 641K |
| 代理商： | SPAK302PV16VC |
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IEEE 1149.1 (JTAG) Test Access Port
7-14
MOTOROLA
7.4.4 CLAMP
The CLAMP instruction selects the single-bit bypass register as shown in Figure 7-11, and
the state of all signals driven from system output pins is completely defined by the data pre-
viously shifted into the boundary scan register (for example, using the SAMPLE/PRELOAD
instruction).
7.4.5 HI-Z
The HI-Z instruction is provided as a manufacturer’s optional public instruction to prevent
having to backdrive the output pins during circuit-board testing. When HI-Z is invoked, all
output drivers are turned off (i.e., high impedance). The instruction selects the bypass reg-
ister.
NOTE
On the MC68EN302, the THREESTATE pin may also be used
during system reset to perform the same function.
7.5 MC68EN302 RESTRICTIONS
The control afforded by the output enable signals using the boundary scan register and the
EXTEST instruction requires a compatible circuit-board test environment to avoid device-
destructive configurations. The user must avoid situations in which the MC68EN302 output
drivers are enabled into actively driven networks.
7.6 NON-SCAN CHAIN OPERATION
In non-scan chain operation, there are two constraints. First, the TCK input does not include
an internal pullup resistor and should not be left unconnected to preclude mid-level inputs.
The second constraint is to ensure that the scan chain test logic is kept transparent to the
system logic by forcing TAP into the test-logic-reset controller state. This is accomplished
by asserting the TRST signal during system reset (RESET and HALT asserted) and leaving
TMS unconnected or tied to VCC.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SPAK56854FG120 | 制造商:Freescale Semiconductor 功能描述: |
| SPAK56857BU120 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:120 MIPS Hybrid Processor |
| SPAK56F803BU80 | 制造商:Freescale Semiconductor 功能描述: |
| SPAK56F805FV80 | 制造商:Freescale Semiconductor 功能描述: |
| SPAKDSP303AG100 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC SPAKDSP303AG100 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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