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    參數(shù)資料
    型號(hào): SPAK302PV16VC
    廠商: FREESCALE SEMICONDUCTOR INC
    元件分類: 微控制器/微處理器
    英文描述: 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144
    封裝: 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASITC, LQFP-144
    文件頁數(shù): 122/128頁
    文件大?。?/td> 641K
    代理商: SPAK302PV16VC
    IEEE 1149.1 (JTAG) Test Access Port
    7-8
    MOTOROLA
    Notes:
    1. Boundary scan cell for SCLK (bit number 132 in table) is for the internal SCLK signal used in the Ethernet
    controller. A boundary scan cell was not included on the EXTAL clock input signal to minimize loading.
    Figure 7-3. Output Latch Cell (iocell)
    Figure 7-4. Input Pin Cell (iscell)
    158
    bicell
    PB9
    I/O
    pb9_enb
    161
    dicell
    pb11_enb
    -
    159
    dicell
    pb10_enb
    -
    162
    bicell
    PB11
    I/O
    pb11_enb
    160
    bicell
    PB10
    I/O
    pb10_enb
    Table 7-2. Boundary Scan Bit Definition
    1
    MUX
    G1
    1
    MUX
    G1
    C
    D
    C
    D
    FROM
    LAST
    CELL
    CLOCK DR
    UPDATE DR
    SHIFT DR
    1—EXTEST / CLAMP
    DATA FROM
    TO OUTPUT
    BUFFER
    0—OTHERWISE
    LOGIC
    SYSTEM
    TO NEXT
    CELL
    FROM LAST
    CELL
    1
    MUX
    1
    G1
    TO DEVICE
    LOGIC
    INPUT
    PIN
    SHIFT DR
    CLOCK DR
    1D
    C1
    TO NEXT
    CELL
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