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參數(shù)資料
| 型號： | SN54ABT18502HVR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數(shù)： | 3/30頁 |
| 文件大?。?/td> | 451K |
| 代理商： | SN54ABT18502HVR |
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SN54ABT18502, SN74ABT18502
SCAN TEST DEVICES WITH
18-BIT REGISTERED BUS TRANSCEIVERS
SCBS109B – AUGUST 1992 – REVISED JUNE 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
11
data register description (continued)
The boundary-control register order of scan is from TDI through bits 20 – 0 to TDO. Table 2 shows the
boundary-control register bits and their associated test control signals.
Table 2. Boundary Control Register Configuration
BCR BIT
NUMBER
TEST
CONTROL
SIGNAL
BCR BIT
NUMBER
TEST
CONTROL
SIGNAL
BCR BIT
NUMBER
TEST
CONTROL
SIGNAL
20
MASK2.9
11
MASK1.9
2
OPCODE2
19
MASK2.8
10
MASK1.8
1
OPCODE1
18
MASK2.7
9
MASK1.7
0
OPCODE0
17
MASK2.6
8
MASK1.6
––
16
MASK2.5
7
MASK1.5
––
15
MASK2.4
6
MASK1.4
––
14
MASK2.3
5
MASK1.3
––
13
MASK2.2
4
MASK1.2
––
12
MASK2.1
3
MASK1.1
––
bypass register
The bypass register is a one-bit scan path that can be selected to shorten the length of the system scan path,
thereby reducing the number of bits per test pattern that must be applied to complete a test operation.
During Capture-DR, the bypass register captures a logic 0.
The bypass register order of scan is illustrated in Figure 3.
Bit 0
TDO
TDI
Figure 3. Bypass Register Order of Scan
device identification register
The device identification register (IDR) is 32 bits long. It can be selected and read to identify the manufacturer,
part number, and version of this device.
During Capture-DR, the binary value 00000000000000000110000000101111 (0000602F, hex) is captured in
the device identification register to identify this device as Texas Instruments SN54/74ABT18502, version 0.
The device identification register order of scan is from TDO through bits 31–0 to TDO. Table 3 shows the device
identification register bits and their significance.
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