參數(shù)資料
型號： SN54ABT18502HVR
廠商： TEXAS INSTRUMENTS INC
元件分類： 總線收發(fā)器
英文描述： ABT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, CQFP68
封裝： CERAMIC, QFP-68
文件頁數(shù)： 2/30頁
文件大?。?/td> 451K
代理商： SN54ABT18502HVR
SN54ABT18502, SN74ABT18502
SCAN TEST DEVICES WITH
18-BIT REGISTERED BUS TRANSCEIVERS
SCBS109B – AUGUST 1992 – REVISED JUNE 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
10
data register description
boundary-scan register
The boundary-scan register (BSR) is 84 bits long. It contains one boundary-scan cell (BSC) for each
normal-function input pin and two BSCs for each normal-function I/O pin (one for input data and one for output
data). The BSR is used 1) to store test data that is to be applied internally to the inputs of the normal on-chip
logic and/or externally to the device output pins, and/or 2) to capture data that appears internally at the outputs
of the normal on-chip logic and/or externally at the device input pins.
The source of data to be captured into the BSR during Capture-DR is determined by the current instruction. The
contents of the BSR can change during Run-Test/Idle as determined by the current instruction. At power up or
in Test-Logic-Reset, the value of each BSC is reset to logic 0 except BSCs 83 – 80, which are reset to logic 1.
The boundary-scan register order of scan is from TDI through bits 83 – 0 to TDO. Table 1 shows the
boundary-scan register bits and their associated device pin signals.
Table 1. Boundary-Scan Register Configuration
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
83
2OEAB
71
2A9-I
53
2A9-O
35
2B9-I
17
2B9-O
82
1OEAB
70
2A8-I
52
2A8-O
34
2B8-I
16
2B8-O
81
2OEBA
69
2A7-I
51
2A7-O
33
2B7-I
15
2B7-O
80
1OEBA
68
2A6-I
50
2A6-O
32
2B6-I
14
2B6-O
79
2CLKAB
67
2A5-I
49
2A5-O
31
2B5-I
13
2B5-O
78
1CLKAB
66
2A4-I
48
2A4-O
30
2B4-I
12
2B4-O
77
2CLKBA
65
2A3-I
47
2A3-O
29
2B3-I
11
2B3-O
76
1CLKBA
64
2A2-I
46
2A2-O
28
2B2-I
10
2B2-O
75
2LEAB
63
2A1-I
45
2A1-O
27
2B1-I
9
2B1-O
74
1LEAB
62
1A9-I
44
1A9-O
26
1B9-I
8
1B9-O
73
2LEBA
61
1A8-I
43
1A8-O
25
1B8-I
7
1B8-O
72
1LEBA
60
1A7-I
42
1A7-O
24
1B7-I
6
1B7-O
––
59
1A6-I
41
1A6-O
23
1B6-I
5
1B6-O
––
58
1A5-I
40
1A5-O
22
1B5-I
4
1B5-O
––
57
1A4-I
39
1A4-O
21
1B4-I
3
1B4-O
––
56
1A3-I
38
1A3-O
20
1B3-I
2
1B3-O
––
55
1A2-I
37
1A2-O
19
1B2-I
1
1B2-O
––
54
1A1-I
36
1A1-O
18
1B1-I
0
1B1-O
boundary-control register
The boundary-control register (BCR) is 21 bits long. The BCR is used in the context of the RUNT instruction to
implement additional test operations not included in the basic SCOPE
instruction set. Such operations include
pseudo-random pattern generation (PRPG), parallel signature analysis (PSA) with input masking, and binary
count up (COUNT). Table 5 shows the test operations that are decoded by the BCR.
During Capture-DR, the contents of the BCR are not changed. At power up or in Test-Logic-Reset, the BCR is
reset to the binary value 000000000000000000010, which selects the PSA test operation with no input masking.
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