參數(shù)資料
型號： SIS300
廠商： SILICON INTEGRATED SYSTEMS CORP
元件分類： 圖形處理器
英文描述： GRAPHICS PROCESSOR, PBGA365
封裝： 27 X 27 MM, BGA-365
文件頁數(shù)： 71/115頁
文件大?。?/td> 2426K
代理商： SIS300
SiS300 2D/3D/Video/DVD Accelerator
Preliminary V0.3 March 23, 1999
51
Silicon Integrated Systems Corporation
5.2.24 CR16: VERTICAL BLANK END
Register Type: Read/Write
Read/Write Port:
3B5/3D5, Index 16h
Default:
00h
D[7:0]
Vertical Blank End Bit[7:0]
5.2.25 CR17: MODE CONTROL REGISTER
Register Type: Read/Write
Read/Write Port:
3B5/3D5, Index 17h
Default:
00h
D7
Hardware Reset
0: Disable horizontal and vertical retrace outputs
1: Enable horizontal and vertical retrace outputs
D6
Word/Byte Address Mode
0: Set the memory address mode to word
1: Set the memory address mode to byte
D5
Address Wrap
0: Disable the full 256K of memory
1: Enable the full 256K of memory
D4
Reserved
D3
Count by Two
0: Byte refresh
1: Word refresh
D2
Horizontal Retrace Select
0: Normal
1: Double Scan
D1
RA1 replace MA14
0: Enable
1: Disable
D0
RA0 replace MA13
0: Enable
1: Disable
5.2.26 CR18: LINE COMPARE REGISTER
Register Type: Read/Write
Read/Write Port:
3B5/3D5, Index 18h
Default:
00h
D[7:0]
Line Compare Bit[7:0]
5.2.27 CR1B: CRT HORIZONTAL COUNTER READ BACK
Register Type: Read Only
Read/Write Port:
3B5/3D5, Index 1Bh
Default:
xxh
D[7:0]
CRT horizontal counter bit[7:0]
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