參數(shù)資料
型號(hào): SIS300
廠商: SILICON INTEGRATED SYSTEMS CORP
元件分類: 圖形處理器
英文描述: GRAPHICS PROCESSOR, PBGA365
封裝: 27 X 27 MM, BGA-365
文件頁數(shù): 29/115頁
文件大?。?/td> 2426K
代理商: SIS300
SiS300 2D/3D/Video/DVD Accelerator
Preliminary V0.3 March 23, 1999
12
Silicon Integrated Systems Corporation
values directly in floating point format. One command parser is implemented for parsing
vertex format into internal hardware command format for VLIW.
Once Setup Engine finishes the setup computations for a triangle, it transfers all these
parameters to Render Engine within one memory clock. While Rendering Engine is busying
drawing a triangle, Setup Engine can calculate the parameters needed for the next one.
Rendering Engine
Rendering Engine is a pipelined structure engine in SiS300.
This engine is formed by
Shading Engine, Texture Engine, and Post Engine.
The output of Shading Engine is a series of pixels with color which represents the shade of a
primitive. Texture Engine is responsible for attaching the texture color on a pixel. Then,
Post Engine will do some operations such as fogging, alpha blending, dithering, and ROP for
this pixel.
To support high quality texture mapping, SiS300 supports point-sampled, linear, bi-linear,
and tri-linear texture filtering. With an integrated high-capacity texture cache, SiS300 can
render texture pixels in the same fill rate no matter whether point-sampled, linear, or bi-linear
texture filtering method is in use. For tri-linear texture mapping, full fill rate can be achieved.
But better video quality is expected rendering in tri-linear texture mapping mode.
Texture Cache
Texture Cache is one of the critical part of high performance 3D design. Most of the 3D
chips have not built-in texture cache and need to fetch each texture pixel again and again
during the rendering process. If the texture is in use for several times, there is no reason to
fetch texture from memory again and again.
Built-in texture cache could significantly
improve texture mapping performance.
With built-in texture cache, each time when a texture miss happens, a segment of texture will
be read from texture buffer and stored in a internal texture cache line. In SiS300, eight
texels texture cache is implemented with eight texels ports. That is what SiS300 can provide
one tri-linear pixel rendering per cycle. Under Direct3D benchmark estimation, more than
98% hit rate has been measured with tri-linear texture mapping.
The texture buffer can
locate in off-screen area or AGP system memory. If you need very large texture buffer size,
the location in AGP system memory is suggested.
Conclusion
The presentation of SiS300 points to the beginning of the new generation of 3D accelerator
and the end of low-end, unbalanced 3D solutions. To achieve a high performance in 3D
rendering, several strategies have to be utilized. Turbo Queue, Setup Engine, Rendering
Engine, and Texture Cache will become the uncompromising choice in high performance 3D
architecture.
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