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| 型號： | SIS300 |
| 廠商： | SILICON INTEGRATED SYSTEMS CORP |
| 元件分類： | 圖形處理器 |
| 英文描述： | GRAPHICS PROCESSOR, PBGA365 |
| 封裝： | 27 X 27 MM, BGA-365 |
| 文件頁數(shù)： | 32/115頁 |
| 文件大小： | 2426K |
| 代理商： | SIS300 |
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SiS300 2D/3D/Video/DVD Accelerator
Preliminary V0.3 March 23, 1999
15
Silicon Integrated Systems Corporation
the video data and the sub-picture data. The scaling factors of sub-picture should be the
same with the video window and the sub-picture scaling will match with the playback video.
Only primary video window can support sub-picture blending.
The video overlay is performed by video color key. The color key can be a range of RGB or
YUV formats. If the video data passed to the color key test and then the video data would be
overlay upon the graphics data. Each video window can have its own video color key. The
video windows have priority for two video window overlayings.
Both primary and secondary video windows can overlayprimary graphics and secondary
graphics (digital video interface). It supports more convenience about these four video
streams usages. That is these two video windows can run at different clock frequency and
be totally independent.
2.6
AGP/PCI BUS INTERFACE
SiS300 connects directly to the PCI or AGP bus with no glue logic, and it decodes the 32-bit
address and responds to the applicable control lines. It could execute both of the I/O and
memory access as an 8-, 16-, and 32-bit device.
In AGP bus interface, SiS300 implements full Side-band feature of AGP 2X mode. One 32-
stage command FIFO is implemented for reducing the latency time of AGP read access. The
AGP interface is used by MPEG commands read, 3D engine texture read, 3D engine vertex
data read and all 2D source data read. The AGP of SiS300 is properly designed to achieve
up to 133MHz AGP clock for maximum 1000MB/sec bandwidth.
2.7
DISPLAY MEMORY CONTROLLER
The Display Memory Controller of SiS300 generates timing for display memory.
It can
support the following DRAM timing:
SDRAM
SGRAM
ESDRAM
For SGRAM, it can support 256Kx32, 512Kx32, and 1Mx32 SGRAM
For SDRAM, it can support 1Mx16, 4Mx16, 2Mx8 SDRAM
For ESDRAM, it can support 1Mx16 and 4Mx16 ESDRAM
The maximum frequency of SiS300 DRAM controller is 143Mhz. It can support up to 2.3
GB/s high bandwidth, with 128-bit DRAM interface. The DRAM capacity can be up to 64MB
frame buffer size which can support highest bandwidth for texture buffer instead of texture
buffer in AGP memory with lower bandwidth. The DRAM controller is pipeline designed:
Optimized DRAM arbiter and SDRAM ping-pong bank operation are also implemented to
reduce DRAM pre-charge time for achieving the maximum utilization rate of SDRAM.
Thorough 128-bit external and internal data buses make the data throughput meeting the
maximum of 128-bit DRAM efficiency.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SIS3100 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Colro Image Sensor Camera Module |
| SIS312 12VDC | 制造商:ELESTA relays 功能描述:SAFETY RELAY 4PST-3NO/1NC 12VDC 6A 制造商:ELESTA relays 功能描述:SAFETY RELAY, 4PST-3NO/1NC, 12VDC, 6A, Coil Voltage VDC Nom:12V, Coil Resistance:285ohm, Contact Current Max:6A, Contact Voltage AC Nom:250V, Contact Voltage DC Nom:440V, Contact Configuration:3PST-NO / SPST-NC, No. of Poles:4 , RoHS Compliant: Yes |
| SIS312 24VDC | 制造商:ELESTA relays 功能描述:Safety Relay 制造商:ELESTA relays 功能描述:SAFETY RELAY, 4PST-3NO/1NC, 24VDC, 6A; Coil Voltage VDC Nom:24V; Coil Resistance:1.15kohm; Contact Current Max:6A; Contact Voltage AC Nom:250V; Contact Voltage DC Nom:440V; Contact Configuration:3PST-NO / SPST-NC; No. of Poles:4 ;RoHS Compliant: Yes |
| SIS322DNT-T1-GE3 | 功能描述:MOSFET 30V 7.5mOhm@10V 38.3A N-Ch G-IV RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
| SIS330DN | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:N-Channel 30 V (D-S) MOSFET |
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