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| 型號： | SIS300 |
| 廠商： | SILICON INTEGRATED SYSTEMS CORP |
| 元件分類： | 圖形處理器 |
| 英文描述： | GRAPHICS PROCESSOR, PBGA365 |
| 封裝： | 27 X 27 MM, BGA-365 |
| 文件頁數(shù)： | 31/115頁 |
| 文件大?。?/td> | 2426K |
| 代理商： | SIS300 |
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SiS300 2D/3D/Video/DVD Accelerator
Preliminary V0.3 March 23, 1999
14
Silicon Integrated Systems Corporation
in pure software MPEG video decoder. What CPU has to do in video decoding are syntax
parsing, variable-length decoding, inverse quantization and IDCT transform. All of the other
video tasks will be done by SiS300.
For MPEG or AC3 audio decoding, it will count on the computation of CPU or an external
MPEG or AC3 audio decoder option.
In the process of MPEG video decoding, SiS300 will allocate four image buffers in off-screen
area. These four image buffers are for I-picture, P-picture, B-picture (under rendering), and
one additional B-picture (under displaying). For MPEG-2 decoding, it takes at least 1980K
bytes off-screen memory.
To support MPEG-2 video overlay, SiS300 doubles its video line buffer length and supports
up to 1920 pixels width of video playback.
2.5
VIDEO ACCELERATOR
SiS300 video accelerator can work in three different modes: standard FC (feature connector)
mode, direct video mode, and PCI multimedia mode.
In standard FC mode, SiS300 supports standard VESA FC standard.
In direct video mode, SiS300 can work with the Philips SAA7110 / SAA7111, Samsung
Ks0127 and Brooktree Bt815/817/819A/835 (8-bit SPI mode 1, 2) and CCIR656 video
interface format to provide the PC-Video solution. Almost all vendors' video decoders can
connect to SiS300 video interface.
After receiving the video data, SiS300 will perform
scaling and store these video data to display memory. Furthermore SiS300 will perform
filtering, and scaling on the stored video data before overlaying with graphics data for final
display.
The video input interface can capture RGB565, YUV422 and YUV420 video formats and
store the video data into the video frame buffer. The new YUV420 mode can reduce the
video capture bandwidth and video capture frame buffer size. The video input unit also
provide the horizontal and vertical downscaling filter to generate better video capture quality.
The vertical downscaling filter is implemented by video capture frame buffer read back
operation, there is no line buffer needed.
In PCI multimedia mode, SiS300 supports PCI multimedia design specification to catch up
future potential trend.
The SiS300 can provide dual video windows with independent video data format, window
size, independent horizontal and vertical scaling factor and video overlaying. Both video
windows can have horizontal and vertical filtering at the same time. The supported video
formats includes RGB555, RGB565, YUYV, YVYU, UYVY, VYUY, and YUV420 modes. A
horizontal downscaling filter is implemented before each video line buffer. It can perform
video downscaling filtering. The pre-scaling filter can be 2-tap, 4-tap and 8-tap.
A sub-picture overlaying video stream is implemented with primary video window for DVD
sub-picture display. The sub-picture data is stored in off-screen memory and the sub-picture
video data read back is independent of video data read. A 16 entries color palette register is
implemented for sub-picture color lookup. A 4-bit blending unit is implemented for combining
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| SIS312 24VDC | 制造商:ELESTA relays 功能描述:Safety Relay 制造商:ELESTA relays 功能描述:SAFETY RELAY, 4PST-3NO/1NC, 24VDC, 6A; Coil Voltage VDC Nom:24V; Coil Resistance:1.15kohm; Contact Current Max:6A; Contact Voltage AC Nom:250V; Contact Voltage DC Nom:440V; Contact Configuration:3PST-NO / SPST-NC; No. of Poles:4 ;RoHS Compliant: Yes |
| SIS322DNT-T1-GE3 | 功能描述:MOSFET 30V 7.5mOhm@10V 38.3A N-Ch G-IV RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導(dǎo)通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
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