參數(shù)資料
型號(hào)： SIS300
廠商： SILICON INTEGRATED SYSTEMS CORP
元件分類： 圖形處理器
英文描述： GRAPHICS PROCESSOR, PBGA365
封裝： 27 X 27 MM, BGA-365
文件頁數(shù)： 23/115頁
文件大小： 2426K
代理商： SIS300
SiS300 2D/3D/Video/DVD Accelerator
Preliminary V0.3 March 23, 1999
7
Silicon Integrated Systems Corporation
Supports VGA BIOS auto memory size detecting
Supports ping-pong banking operation by 4 bank registers
Supports SGRAM block write operation
High Integration
Built-in CRT FIFOs to support super high resolution graphics modes and
reduce CPU wait-state
Built-in programmable 24-bit true-color RAMDAC up to 270 MHz pixel clock
- Built-in reference voltage generator and monitor sense circuit
- Supports down-loadable 24 bits RAMDAC for gamma correction in high color
and true color modes
- Supports programmable pedestal enable
- Supports programmable slew rate control
Built-in three clock generators
- Integrates PLL loop filter for CRT, Engine and DRAM
Built-in 14.318/13.5 MHz reference clock oscillator circuits
Built-in two video line buffers for MPEG II video playback
Built-in standard feature connector logic support
Built-in VIP 1.1, VIP 2.0 video port interface
Built-in flash ROM programming interface
Built-in VESA Plug & Display for CH7003, PanelLinkTM and LVDS digital
interface
Built-in secondary CRT controller for independent secondary CRT, LCD or
TV digital output
Built-in Subsystem and Subsystem Vender ID auto power on auto fetch
cycle
Resolution, Color & Frame Rate
Supports 270 MHz pixel clock
Supports VESA standard super high resolution graphics modes
- 640x480
16/256/32K/64K/16M colors 120 Hz NI
- 800x600
16/256/32K/64K/16M colors 120 Hz NI
- 1024x768
256/32K/64K/16M colors 120 Hz NI
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