SCF5250 Data Sheet: Technical Data, Rev. 1.3 Freescale Se" />
參數(shù)資料
型號(hào)： SCFLXRAYADPTS12
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 9/56頁(yè)
文件大小： 0K
描述： ADAPTER BOARD FRDC
標(biāo)準(zhǔn)包裝： 1
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SCF5250 Data Sheet: Technical Data, Rev. 1.3
Freescale Semiconductor
17
3.12
Subcode Interface
There is a 3-line subcode interface on the SCF5250 processor. This 3-line subcode interface allows the
device to format and transmit subcode in EIAJ format to a CD channel encoder device. The three signals
are described in Table 9.
3.13
Analog to Digital Converter (ADC)
The ADOUT signal on the ADOUT/SCLK4/GPIO58 pin provides the reference voltage in PWM format.
This output requires an external integrator circuit (resistor/capacitor) to convert it to a DC level to be input
to the ADREF pin.
The six AD inputs are each fed to their own comparator. The reference input to each (ADREF) is then
multiplexed as only one AD comparison can be made at any one time.
NOTE
To use the ADINx as General Purpose inputs (rather than there analogue function) it is
necessary to generate a fixed comparator voltage level of VDD/2. This can be
accomplished by a potential divider network connected to the ADREF pin. However in
portable applications where stand-by power consumption is important the current taken
by the divider network (in stand-by mode) could be excessive. Therefore it is possible to
generate a VDD/2 voltage by selecting SCLK4 output mode and feeding this clock signal
(which is 50% duty cycle) through an external integration circuit. This would generate a
voltage level equal to VDD/2 but would be disabled when stand-by mode was selected.
3.14
Secure Digital/Memory Stick Card Interface
The device has a versatile flash card interface that supports both Secure Digital and Memory Stick cards.
The interface can either support one Secure Digital or two Memory Stick cards. No mixing of card types
is possible. Table 10 gives the pin descriptions.
Table 9. Subcode Interface Signal
Signal name
Description
RCK/QSPI_DIN/QSPI_DOUT/GPIO26 Subcode clock input. When pin is used as subcode clock, this pin is driven by the CD
channel encoder.
QSPI_DOUT/SFSY/GPIO27
Subcode sync output
This signal is driven high if a subcode sync needs to be inserted in the EFM stream.
QSPI_CLK/SUBR/GPIO25
Subcode data output
This signal is a subcode data out pin.
Table 10. Flash Memory Card Signals
Flash Memory Signal
Description
EBUIN2/SCLKOUT/GPIO13
Clock out for both Memory Stick interfaces and for Secure Digital
EBUIN3/CMD_SDIO2/GPIO14
Secure Digital command line
Memory Stick interface 2 data I/O
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