SCF5250 Data Sheet: Technical Data, Rev. 1.3 Freescale Se" />
參數(shù)資料
型號: SCFLXRAYADPTS12
廠商: Freescale Semiconductor
文件頁數(shù): 14/56頁
文件大?。?/td> 0K
描述: ADAPTER BOARD FRDC
標(biāo)準(zhǔn)包裝: 1
系列: *
附件類型: *
適用于相關(guān)產(chǎn)品: *
SCF5250 Data Sheet: Technical Data, Rev. 1.3
Freescale Semiconductor
21
3.20.2
Clock Input
SCF5250 includes an on-chip crystal oscillator. The crystal should be connected between CRIN and
CROUT. An externally generated clock signal can also be used and should be connected directly to the
CRIN pin.
3.21
Wake-Up Signal
To exit power down mode, apply a LOW level to the WAKE_UP/GPIO21 input pin.
3.22
On-Chip Linear Regulator
The SCF5250 includes an on-chip linear regulator. This regulator provides an 1.2 V output which is
intended to be used to power the SCF5250 core. Three pins are associated with this function.
LININ, LINOUT and LINGND. Typically LININ would be fed by the I/O (PAD) supply (3.3 V) with
separate filtering recommended to provide some isolation between the I/O and the core.
In portable solutions this linear regulator may not be efficient enough and in this case we would expect the
1.2 V supply to be generated externally, possibly by a highly efficient DC-DC convertor.
If not used leave pins not connected.
4
Electrical Characteristics
Table 14 through Table 19 provide the electrical characteristics for the SCF5250 processor. The remaining
figures and tables in this section provide the timing diagrams and the timing parameters for the SCF5250
processor.
Table 13. Quick Reference for Electrical Characteristics
For
See
Maximum Ratings
Operating Temperature
Recommended
Operating Supply
Voltages
Linear Regulator
Operating Specification
DC Electrical
Specifications
Operating Parameters
for ADC DC Electrical
Characteristics
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