SCF5250 Data Sheet: Technical Data, Rev. 1.3 36 Freescale" />
參數(shù)資料
型號(hào)： SCFLXRAYADPTS12
廠商： Freescale Semiconductor
文件頁數(shù)： 30/56頁
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SCF5250 Data Sheet: Technical Data, Rev. 1.3
36
Freescale Semiconductor
Figure 14 provides the SCLK input/output, SDATA input timing diagram and Table 33 provides the timing
parameters.
Figure 14. SCLK Input/Output, SDATA Input Timing Diagram
5
Pin-Out and Package Information
Visit the URL [http://www.freescale.com/coldfire] and choose the documentation library to obtain
information on the mechanical characteristics of the SCF5250 integrated microprocessor. Thermal
characteristics are not available at this time.
The SCF5250 is available in a 144 pin QFP and a 196 pin MAPBGA package. Use Table 34 to find the
information desired.
5.1
144 QFP Pin Assignments
The SCF5250 can be assembled in 144-pin QFP package. Table 35 provides the pin assignments for the
package.
Table 33. SCLK Input/Output, SDATA Input Timing Specifications
Num
Characteristic
Min
Max
Units
TSU
SDATAI IN to SCLKn
-5
–
ns
TH
SCLK rise to SDATAI
3
–
ns
Table 34. Section Quick Reference
For Chip
Package
See
144 pin QFP
Pin assignments
Package drawings
196 MAPBGA
Pin assignments
Package drawings
Ball map
SCLK
SDATA1, 3, 4 (INPUT)
TSU
TH
(
INPUT OR OUTPUT)
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