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| 型號： | SC28L92 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 3.3V- 5.0V Dual universal asynchronous receiver/transmitter (DUART）(3.3V- 5.0V雙通用異步接收器/傳送器) |
| 中文描述： | 3.3 - 5.0V雙路通用異步接收/發(fā)送器（杜阿爾特）（3.3 - 5.0V雙通用異步接收器/傳送器） |
| 文件頁數(shù)： | 9/44頁 |
| 文件大小： | 284K |
| 代理商： | SC28L92 |
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Philips Semiconductors
Product specification
SC28L92
3.3V–5.0V Dual Universal Asynchronous
Receiver/Transmitter (DUART)
2000 Jan 21
9
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Pwr
PIN
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I/O
: Bi-directional 3-State data bus used to transfer commands, data and status between the DUART and the
CPU. D0 is the least significant bit.
D0–D7
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D0–D7 as controlled by the R/WN and A0–A3 inputs. When High, places the D0–D7 lines in the 3-State condition.
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Chip Enable
: Active-Low input signal. When Low, data transfers between the CPU and the DUART are enabled on
IACKN
A0–A3
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INTRN
X2
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Interrupt Acknowledge
: Active low input indicating an interrupt acknowledge cycle. Usually asserted by the CPU in
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DACKN
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Address Inputs
: Select the DUART internal registers and ports for read/write operations.
(High) state. Sets MR pointer to MR1. See Figure 4
indicate proper transfer of data between the CPU and the DUART.
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Data Transfer Acknowledge
: A3-State active -low output asserted in a write, read, or interrupt acknowledge cycle to
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RESETN
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Interrupt Request
: Active-Low, open-drain, output which signals the CPU that one or more of the eight maskable
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Reset
: A low level clears internal registers (SRA, SRB, IMR, ISR, OPR, OPCR), puts OP0–OP7 in the High state,
stops the counter/timer, and puts Channels A and B in the inactive state, with the TxDA and TxDB outputs in the mark
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X1/CLK
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must
a crystal is used, a capacitor must be connected from this pin to ground (see Figure 11).
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Crystal 1
: Crystal or external clock input. A crystal or clock of the specified limits must be supplied at all times. When
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condition when the transmitter is disabled, idle or when operating in local loop back mode. “Mark” is High; “space” is Low.
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automatically on receive or transmit.
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output.
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OP5
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Output 5
: General-purpose output or Channel B open-drain, active-Low, RxB interrupt ISR[5] output.
OP7
IP1
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Output 7
: General-purpose output, or Channel B open-drain, active-Low, TxB interrupt ISR[4] output.
Input 1
: General purpose input or Channel B clear to send active-Low input (CTSBN).
IP0
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Input 0
: General purpose input or Channel A clear to send active-Low input (CTSAN).
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IP4
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GND
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Input 4
: General purpose input or Channel A receiver external clock input (RxCA). When the external clock is used by
by the transmitter, the transmitted data is clocked on the falling edge of the clock.
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Input 3
: General purpose input or Channel A transmitter external clock input (TxCA). When the external clock is used
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Ground
by the transmitter, the transmitted data is clocked on the falling edge of the clock.
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Input 5
: General purpose input or Channel B transmitter external clock input (TxCB). When the external clock is used
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SC28L92A1A | 制造商:NXP Semiconductors 功能描述:UART DUAL 3.3V OR 5V SMD 28L92 |
| SC28L92A1A,512 | 功能描述:UART 接口集成電路 3V-5V 2CH UART INTEL/MOT INTRF RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L92A1A,518 | 功能描述:UART 接口集成電路 3V-5V 2CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L92A1A,529 | 功能描述:UART 接口集成電路 3V-5V 2CH UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC28L92A1A512 | 制造商:NXP Semiconductors 功能描述:IC DUAL UART FIFO 1MBPS 5.5V LCC-44 |
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