- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98074 > SAF-C513A-HN (INFINEON TECHNOLOGIES AG) 8-BIT, EEPROM, 8 MHz, MICROCONTROLLER, PQCC44 PDF資料下載
參數(shù)資料
| 型號(hào)： | SAF-C513A-HN |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, EEPROM, 8 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁(yè)數(shù)： | 55/128頁(yè) |
| 文件大?。?/td> | 1837K |
| 代理商： | SAF-C513A-HN |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)當(dāng)前第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)
System Reset
Semiconductor Group
5-1
5
System Reset
5.1
Hardware Reset
The hardware reset function built in the SAB-C511/513 microcontrollers allows for an easy
automatic start-up at a minimum of additional hardware and forces the controller to a predefined
default state. The hardware reset function can also be used during normal operation in order to
restart the device. This is particularly done when the power-down mode is to be terminated (see
power-down description chapter 8).
The reset input is an active high input. An internal Schmitt trigger is used at the input for noise
rejection. Since the reset is synchronized internally, the RESET pin must be held high for at least
two machine cycles (12 oscillator periods) while the oscillator is running. With the oscillator running
the internal reset is executed during the second machine cycle and is repeated every cycle until
RESET goes low again.
During RESET active, the pins ALE and PSEN are configured as inputs and should not be active
driven externally. An external stimulation at these lines during reset activates several test modes
which are reserved for test purposes. This in turn may cause unpredictable output operations at
several port pins.
At the RESET pin a pulldown resistor is internally connected to
V
SS to allow a power-up reset
operation with an external capacitor only. An automatic reset can be obtained when power supply
is applied by connecting the reset pin via an external capacitor to
V
CC. After the power supply has
been turned on, the capacitor must hold the voltage level at the reset pin for a specified time to effect
a complete reset.
A correct reset leaves the processor in a defined state. The program execution starts at location
0000H. After reset is internally accomplished the port latches of ports 0, 1, 2 and 3 default in FFH.
This leaves port 0 floating, since it is an open drain port when not used as data/address bus. All
other I/O port lines (ports 1, 2 and 3) output a one (1).
The contents of the internal RAM (conventional and XRAM) of the SAB-C511/513 is not affected by
a reset. After power-up the contents is undefined, while it remains unchanged during a reset if the
power supply is not turned off.
Note:
For the SAB-C513A-H (EEPROM version) the RESET signal has to be activated for at least 10 ms
if power is applied to the device. The reason for this is that the reference voltage generator of the
EEPROM device needs some time to come up from power-down state. In the power-on behaviour
there are no differences between the EEPROM and ROM versions.
This reset behaviour of the EEPROM version has to be taken into account for systems that also will
uses ROM versions of the SAB-C511/513 family and that use its software power down features.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAF-C515A-LM | 8-BIT, 18 MHz, MICROCONTROLLER, PQFP80 |
| SAF-C515C-8EMCA | 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP80 |
| SAF-C517A-4R24M | 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP100 |
| SAF-C868-1RR | 8-BIT, MROM, 40 MHz, MICROCONTROLLER, PDSO38 |
| SAF-C868-1SR | 8-BIT, 40 MHz, MICROCONTROLLER, PDSO38 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAF-C513AO | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-bit CMOS Microcontroller |
| SAF-C515 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
| SAF-C515-1R24M | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
| SAF-C515-1RM | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
| SAF-C515A-4R | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:8-Bit CMOS Microcontroller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。