參數(shù)資料
型號: SAF-C513A-HN
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, EEPROM, 8 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 16/128頁
文件大小: 1837K
代理商: SAF-C513A-HN
EEPROM Programming Interface
SAB-C513A-H
Semiconductor Group
9-12
9.2.5.2
Write Operation
The following sequence of operations is necessary for writing (programming) bytes or memory
blocks:
1. Writing the data byte to be programmed into the register PDATA.
2. Selection of the memory area (block or single byte) to be written by programming PMSEL.
3. Writing the address of the byte/block to be programmed into PADRH and PADRL.
4. Set EEPROM operation mode bits in PCNTRL to EOM2-0=010B and the PROG bit to 1.
5. Wait at least 10 ms.
6. Reset the PROG bit to 0 with still EOM2-0=010B.
7. Wait 20
s (guard time for discharging high voltage generator).
8. Set EOM2-0=000B and PROG=0.
The steps of the program operation are illustrated in figure 9-9-7.
Figure 9-7
Write (Programming) Sequence
Before writing (programming) a memory location it should be erased (=FFH), otherwise the old data
would be “and-ed’ with the new data and the result being programmed.
9.2.5.3
Read Operation
The following sequence of operations is necessary for reading of a byte:
1. Writing the address of the byte to be read into PADRH and PADRL.
2. Set EEPROM operation mode bits in PCNTRL to EOM2-0=100B and select whether automatic
address increment should be performed (ADRI=1) or not (ADRI=0)
3. Perform a read from register PDATA. The content of the selected memory location will be
transferred during this read.
Read operations can be done on the byte selected by PADRH/PADRL only. A requested block
operation (SEL bits in PMSEL) will be ignored.
The automatic address increment mode reduces the overhead when reading out the memory but
also when programming subsequent locations: when doing the read for verifying correct
programming, the address is automatically incremented and points to the next location to be
programmed.
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