參數(shù)資料
型號： SAB82525N
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 4M bps, MULTI PROTOCOL CONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 69/126頁
文件大?。?/td> 730K
代理商： SAB82525N
Semiconductor Group
47
SAB 82525
SAB 82526
SAF 82525
SAF 82526
4.5 FIFO Structure
In both transmit and receive direction 64-byte deep FIFO’s are provided for the intermediate
storage of data between the serial interface and the CPU interface. The FIFO’s are divided into
two halves of 32-bytes, where only one half is accessible to the CPU or DMA controller at any
time.
The organization of the Receive FIFO (RFIFO) is such, that in the case of a frame at most 64
bytes long, the whole frame may be stored in the RFIFO. After the first 32 bytes have been
received, the HSCX prompts to read the 32-byte block by means of interrupt or DMA request
(RPF interrupt or activation of DRQR line). This block remains in the RFIFO until a confirmation
is given to the HSCX acknowledging the transfer of the data block. This confirmation is either
a RMC (Receive Message Complete) command via the CMDR register in Interrupt Mode, or
is implicitly achieved in DMA mode after 32-bytes have been read from the RFIFO. As a result,
it’s possible in Interrupt Mode, to read out the data block any number of times until the RMC
command is issued.
The configuration of the RFIFO prior to and after acknowledgement is shown in figure 21.
Figure 21
Configuration of RFIFO (Long Frames)
ITD01582
32
Inaccessible
Accessible
32
a) Prior to
Acknowledgement
b) After
Acknowledgement
Block
B + 1
Block
B
Free
B + 1
Block
Bytes
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAB82525N-V2.1 制造商:Siemens 功能描述:82525N-V2.1
SAB82525NV2.1GHSCX 制造商:Infineon Technologies AG 功能描述:
SAB82525N-V2.1GHSCX 制造商:Infineon Technologies AG 功能描述:
SAB82525NV2.1HSCX 制造商:Rochester Electronics LLC 功能描述:- Bulk
SAB82525NV2.2 功能描述:輸入/輸出控制器接口集成電路 T/E RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray
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