參數(shù)資料
型號(hào): SAA7390
廠商: NXP Semiconductors N.V.
英文描述: High performance Compact Disc-Recordable CD-R controller
中文描述: 高性能式光盤CD - R光盤控制器
文件頁(yè)數(shù): 55/76頁(yè)
文件大小: 366K
代理商: SAA7390
1996 Jul 02
55
Philips Semiconductors
Preliminary specification
High performance Compact
Disc-Recordable (CD-R) controller
SAA7390
15.3
R-W timing
(see Fig.17)
The data from sub-code R-W may be read via the V4 pin
from the CD-decoder (SAA7372) and has a format similar
to RS232. The sub-code synchronization word is
formatted by a pause of 200
μ
s minimum. Each sub-code
byte starts with a logic 1 followed by seven bits (Q to W).
The gap between bytes is variable between 1.3 and 90
μ
s.
15.4
C-flag timing
(see Fig.18)
A 1-bit flag signal is input to the CFLAG pin. This signal
shows the status of the error corrector and interpolator and
is updated every frame.
Fig.17 Sub-code formatting and timing from the V4 pin.
handbook, full pagewidth
W96
1
Q1
R1
S1
T1
U1
V1
W1
1
200
μ
s min
11.3
μ
s
11.3
μ
s min
90
μ
s max
MGE401
Fig.18 C-flag output timing.
handbook, full pagewidth
F1
F2
F3
F4
F5
F6
F7
11.3
μ
s
45.4
μ
s
(nominal speed)
MGE402
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