參數(shù)資料
型號(hào): S1C60N04D
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC48
封裝: DIE-48
文件頁數(shù): 9/50頁
文件大小: 372K
代理商: S1C60N04D
S1C60N04 TECHNICAL MANUAL
EPSON
11
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
Input interrupt programming related precautions
Port K input
Factor flag set Not set
Mask register
Active status
When the content of the mask register is rewritten, while the port
K input is in the active status. The input interrupt factor flag is
set at .
Fig. 4.3.2.2 Input interrupt timing
When using an input interrupt, if you rewrite the content of the mask register, when the value of the
input terminal which becomes the interrupt input is in the active status (input terminal = high status), the
factor flag for input interrupt may be set.
For example, a factor flag is set with the timing of shown in Figure 4.3.2.2. However, when clearing the
content of the mask register with the input terminal kept in the high status and then setting it, the factor
flag of the input interrupt is again set at the timing that has been set.
Consequently, when the input terminal is in the active status (high status), do not rewrite the mask
register (clearing, then setting the mask register), so that a factor flag will only set at the rising edge in
this case. When clearing, then setting the mask register, set the mask register, when the input terminal is
not in the active status (low status).
4.3.3 Mask option
The contents that can be selected with the input port mask option are as follows:
(1) An internal pull-down resistor can be selected for each of the four bits of the input ports (K00–K03).
Having selected "pull-down resistor disabled", take care that the input does not float. Select "pull-
down resistor enabled" for input ports that are not being used.
(2) The input interrupt circuit contains a noise rejection circuit to prevent interrupts form occurring
through noise. The mask option enables selection of the noise rejection circuit for each separate pin
series. When "use" is selected, a maximum delay of 0.5 msec (fosc = 2 MHz), tolerance is within 5%,
occurs from the time an interrupt condition is established until the interrupt factor flag (IK0) is set to
1.
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