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參數(shù)資料
| 型號： | S1C60N04D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC48 |
| 封裝： | DIE-48 |
| 文件頁數(shù)： | 10/50頁 |
| 文件大?。?/td> | 372K |
| 代理商： | S1C60N04D |
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12
EPSON
S1C60N04 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
4.3.4 I/O memory of input port
Table 4.3.4.1 list the input port control bits and their addresses.
Table 4.3.4.1 Input port control bits
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
0E0H
K03
K02
K01
K00
R
K03
K02
K01
K00
– 2
High
Low
K0 input port data
0E8H
EIK03
EIK02
EIK01
EIK00
R/W
EIK03
EIK02
EIK01
EIK00
0
Enable
Mask
Interrupt mask register (K03)
Interrupt mask register (K02)
Interrupt mask register (K01)
Interrupt mask register (K00)
0EDH
000
IK0
R
0 3
IK0 4
– 2
0
–
Yes
–
No
Unused
Interrupt factor flag (K00–K03)
1
2
Initial value at initial reset
Not set in the circuit
3
4
Always "0" being read
Reset (0) immediately after being read
K00–K03: Input port data (0E0H)
The input data of the input port pins can be read with these registers.
When 1 is read: High level
When 0 is read: Low level
Writing: Invalid
The value read is 1 when the pin voltage of the four bits of the input port (K00–K03) goes high (VDD), and
0 when the voltage goes low (VSS). These bits are reading, so writing cannot be done.
EIK00–EIK03: Interrupt mask registers (0E8H)
Masking the interrupt of the input port pins can be done with these registers.
When 1 is written: Enable
When 0 is written: Mask
Reading: Valid
With these registers, masking of the input port bits can be done for each of the four bits. After an initial
reset, these registers are all set to 0.
IK0: Interrupt factor flag (0EDHD0)
This flag indicates the occurrence of an input interrupt.
When 1 is read: Interrupt has occurred
When 0 is read: Interrupt has not occurred
Writing: Invalid
The interrupt factor flag IK0 is associated with K00–K03. From the status of this flag, the software can
decide whether an input interrupt has occurred.
This flag is reset when the software has read it.
Reading of interrupt factor flag is available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the interrupt factor flag to be read is set to 1, an
interrupt request will be generated by the interrupt factor flag set timing, or an interrupt request will not
be generated.
After an initial reset, this flag is set to 0.
4.3.5 Programming note
When modifying the input port from high level to low level with pull-down resistor, a delay will occur at
the fall of the waveform due to time constant of the pull-down resistor and input gate capacities. Provide
appropriate waiting time in the program when performing input port reading.
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