參數(shù)資料
型號(hào)： S1C60N04D
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC48
封裝： DIE-48
文件頁(yè)數(shù)： 28/50頁(yè)
文件大?。?/td> 372K
代理商： S1C60N04D
28
EPSON
S1C60N04 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT/SLEEP)
4.8 Interrupt and HALT/SLEEP
Interrupt types
The S1C60N04 provides the following interrupt settings, each of which is maskable.
External interrupt:
Input port interrupt (one)
Internal interrupt:
Timer interrupt (one)
To enable interrupts, the interrupt flag must be set to 1 (EI) and the necessary related interrupt mask
registers must be set to 1 (enable). When an interrupt occurs, the interrupt flag is automatically reset to 0
(DI) and interrupts after that are inhibited.
Figure 4.8.1 shows the configuration of the interrupt circuit.
K00
EIK00
K01
EIK01
K02
EIK02
K03
EIK03
IT2
EIT2
IT8
EIT8
IT32
EIT32
IK0
(MSB)
:
(LSB)
Program counter of CPU
(three low-order bits)
SLEEP
cancellation
Interrupt vector
Interrupt factor flag
Interrupt mask register
Interrupt
flag
INT
(Interrupt request)
Fig. 4.8.1 Configuration of interrupt circuit
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