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參數(shù)資料
| 型號： | S1C60N04D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC48 |
| 封裝： | DIE-48 |
| 文件頁數(shù)： | 27/50頁 |
| 文件大?。?/td> | 372K |
| 代理商： | S1C60N04D |
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S1C60N04 TECHNICAL MANUAL
EPSON
27
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Clock Timer)
TMRST: Clock timer reset (0F9HD2)
This bit resets the clock timer.
When 1 is written: Clock timer reset
When 0 is written: No operation
Reading: Always 0
The clock timer is reset by writing 1 to TMRST. The clock timer starts immediately after this. No opera-
tion results when 0 is written to TMRST.
This bit is write-only, and so is always 0 when read.
4.7.4 Programming notes
(1) Note that the frequencies and times differ from the description in this section when the oscillation
frequency is not 2 MHz. In the case of S1C60N04, tolerance is within 5%.
(2) Reading of interrupt factor flags is available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the interrupt factor flag to be read is set to 1, an
interrupt request will be generated by the interrupt factor flag set timing, or an interrupt request will
not be generated. Be very careful when interrupt factor flags are in the same address.
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