
S1C60N04 TECHNICAL MANUAL
EPSON
5
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
2.2.1 Power-on reset circuit
The power-on reset circuit outputs the initial reset signal at power-on until the oscillation circuit starts
oscillating.
Note: The power-on reset circuit may not work properly due to unstable or lower voltage input. The
following two initial reset method are recommended to generate the initial reset signal.
2.2.2 Reset pin (RESET)
An initial reset can be invoked externally by making the reset pin high.
When the reset pin goes low the CPU begins to operate.
2.2.3 Simultaneous high input to input ports (K00–K03)
A
Not used
B
K00*K01
C
K00*K01*K02
D
K00*K01*K02*K03
When, for instance, mask option D (K00*K01*K02*K03) is selected, an initial reset is executed when the
signals input to the four ports K00–K03 are all high at the same time.
When this function is used, make sure that the specified ports do not go high at the same time during
normal operation.
2.2.4 Internal register following initialization
An initial reset initializes the CPU as shown in the table below.
Table 2.2.4.1 Initial values
See Section 4.1, "Memory Map".
Name
Program counter step
Program counter page
New page pointer
Stack pointer
Index register X
Index register Y
Register pointer
General-purpose register A
General-purpose register B
Interrupt flag
Decimal flag
Zero flag
Carry flag
CPU Core
Symbol
PCS
PCP
NPP
SP
X
Y
RP
A
B
I
D
Z
C
Bit size
8
4
8
4
1
Initial value
00H
1H
Undefined
0
Undefined
Name
RAM
Display memory
Other peripheral circuits
Peripheral Circuits
Bit size
144
×4
26
×4
–
Initial value
Undefined
2.3 Test Pin (TEST)
This pin is used when IC is inspected for shipment. During normal operation connect it to VSS.
Another way of invoking an initial reset externally is to input a
high signal simultaneously to the input ports (K00–K03) selected
with the mask option. The specified input port pins must be kept
high for at least 1 sec (when oscillating frequency fosc = 2 MHz),
tolerance is within 5%, because of the noise rejection circuit. Table
2.2.3.1 shows the combinations of input ports (K00–K03) that can be
selected with the mask option.
Table 2.2.3.1 Input port combinations