參數(shù)資料
型號: PDC2
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 9/25頁
文件大?。?/td> 291K
代理商: PDC2
9
Peripheral Data Controller 2 (PDC2)
1734B
CASIC
02/02
Figure 3.
oe_master_address Signal for Atmel AMBA Bus
This output is generated to simplify the multiplexing of the control signals generated by the
PDC2. It indicates that the PDC2 is
really granted
on the bus (ASB) and that its control sig-
nals must be sent to the slaves.
Thus, oe_master_address is asserted when the PDC2 is granted via agnt and there is no
transfer being done by another master, i.e. bwait is inactive. oe_master_address is de-
asserted when the core has finished its last transfer, i.e. bwait is inactive.
agnt
clock
bwait
t
OVMABE
t
OVMABE
master_add[31:0]
oe_master_address
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