參數(shù)資料
型號: PDC2
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 10/25頁
文件大小: 291K
代理商: PDC2
10
Peripheral Data Controller 2 (PDC2)
1734B
CASIC
02/02
Figure 4.
ASB to APB Transfer with Zero Wait States Memory Followed by an APB Access Made by Another Master
clock
areq (PDC2)
agnt (PDC2)
bridge_sel
agnt (other master)
bwait
bwrite (PDC2)
master_add[31:0]
PDC2status
bwrite (ASB)
ba[31:0] (ASB)
memory_write
pdc_size[1:0]
pdc_write
pdc_add[20:0]
Data from Memories
(pdc_data[31:0] on Bridge)
pdc_sel
bwdata[31:0]
(data_from_master[31:0] on bridge)
periph_stb
pstb_rising
periph_add[13:0]
periph_write
pwdata[31:0]
done
done
wait
wait
Memory
Transfer
NOT GRANTED
NOT GRANTED
Peripheral Address
PDC Data
PDC
Data from Master
14'h0000
Peripheral Address
Address from Master
14'h0000
bwrite from Master
Previous Data
PDC Data
Data from Master
done
bwrite from Master
Memory
ba from Master
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