參數(shù)資料
型號(hào): PCF8811
廠商: NXP Semiconductors N.V.
英文描述: 80 x 128 pixels matrix LCD driver
中文描述: 80 × 128像素矩陣LCD驅(qū)動(dòng)器
文件頁數(shù): 8/73頁
文件大?。?/td> 434K
代理商: PCF8811
2004 May 17
8
Philips Semiconductors
Product specification
80
×
128 pixels matrix LCD driver
PCF8811
7.20
OSC: oscillator
When the on-chip oscillator is used this input must be
connected to V
DD1
. An external clock signal, if used, is
connected to this input. If the oscillator and external clock
are both inhibited by connecting the OSC pin to V
SS1
, the
display is not clocked and may be left in a DC state. To
avoid this the chip should always be put into Power-down
mode before stopping the clock.
7.21
RES: reset
This signal will reset the device and must be applied to
properly initialize the chip. The signal is active LOW.
8
BLOCK DIAGRAM FUNCTIONS
8.1
Oscillator
The on-chip oscillator provides the clock signal for the
display system. No external components are required and
the OSC input must be connected to V
DD1
. An external
clock signal, if used, is connected to this input.
8.2
Address Counter (AC)
The address counter assigns addresses to the display
data RAM for writing. The X address X[6:0] and the
Y address Y[3:0] are set separately.
8.3
Display Data RAM (DDRAM)
The PCF8811 contains an 80
×
128-bit static RAM which
stores the display data. The RAM is divided into 10 banks
of 128 bytes (10
×
8
×
128 bits). The icon row when
enabled is always ROW 79 and therefore located in
bank 9. During RAM access, data is transferred to the
RAM via the parallel, serial interface or I
2
C-bus interface.
There is a direct correspondence between the X address
and the column output number.
8.4
Timing generator
The timing generator produces the various signals
required to drive the internal circuitry. Internal chip
operation is not affected by operations on the data bus.
8.5
Display address counter
The display is generated by simultaneously reading out
the RAM content for 2, 4 or 8 rows depending on the
selected current display size. This content will be
processed with the corresponding set of 2, 4 or 8
orthogonal functions and so generating the signals for
switching the pixels in the display on or off according to the
RAM content. The possibility exists to set the p value for
the display sizes 64 and 80 manually to p = 4.
The display status (all dots on/off and normal/inverse
video) is set by the bits DON, DAL and E in the command
display control; see Table 6.
8.6
LCD row and column drivers
The PCF8811 contains 80 row and 128 column drivers,
which connect the appropriate LCD bias voltages in
sequence to the display in accordance with the data to be
displayed.
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