參數(shù)資料
型號: PCF8811
廠商: NXP Semiconductors N.V.
英文描述: 80 x 128 pixels matrix LCD driver
中文描述: 80 × 128像素矩陣LCD驅(qū)動器
文件頁數(shù): 57/73頁
文件大?。?/td> 434K
代理商: PCF8811
2004 May 17
57
Philips Semiconductors
Product specification
80
×
128 pixels matrix LCD driver
PCF8811
22.5
Interface commands
These instructions are in addition to those indicated in Table 5.
Table 24
Additional instructions; note 1
Note
1.
X = don’t care.
22.5.1
CALMM
This instruction puts the device in calibration mode. This mode enables the shift register for loading and allows
programming of the non-volatile OTP cells to take place. If the seal bit is set then this mode cannot be accessed and the
instruction will be ignored. Once in calibration mode all commands are interpreted as shift register data. The mode can
only be exited by sending data with bit D7 set to logic 0. Reset will also clear this mode. Each shift register data byte is
preceded by D/C = 0 and has only 2 significant bits, thus the remaining 6 bits are ignored. Bit D7 is the continuation bit
(D7 = 1 remain in CALMM mode, D7 = 0 exit CALMM mode). Bit D0 is the data bit and its value is shifted into the OTP
shift register (on the falling edge of SCLK).
NAME
EXT
D/C
R/W
COMMAND BYTE
ACTION
D7
D6
D5
D4
D3
D2
D1
D0
CALMM
Power control
(‘Refresh’)
X
X
0
0
0
0
1
0
0
0
0
1
0
0
0
1
0
1
0
1
enter CALMM mode
switch HVgen on/off
to force a refresh of
the shift register
PC1
PC0
handbook, full pagewidth
DATA TO THE CIRCUIT FOR
CONFIGURATION AND CALIBRATION
SHIFT
REGISTER
FLIP-FLOP
OTP slice
OTP CELL
SHIFT
REGISTER
SHIFT
REGISTER
DATA
INPUT
read data
from the
OTP cell
write data
to the
OTP cell
OTP CELLs
MGU289
Fig.48 Basic OTP architecture.
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