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參數(shù)資料
| 型號： | PCA5010 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Pager baseband controller |
| 中文描述： | 傳呼機基帶控制器 |
| 文件頁數(shù)： | 34/112頁 |
| 文件大?。?/td> | 627K |
| 代理商： | PCA5010 |
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1998 Nov 02
34
Philips Semiconductors
Product specification
Pager baseband controller
PCA5010
Fig.18 Synchronization of local counter operation and access from the microcontroller.
handbook, full pagewidth
MGR119
76.8 kHz
SET flag (local)
store (local)
data (SFR)
data (local)
counter
reload from
local data
I
I
1
I
2
I
3
I
4
1
0
K
K
1
K
2
K
K
6.12
6 MHz oscillator
6.12.1
F
UNCTION
The 6 MHz oscillator provides the clock for the DC/DC
converter, the I
2
C-bus interface, the port I/Os and for the
external memory access timing (ALE/PSEN).
The 6 MHz oscillator is a 5 inverter stage current
controlled ring oscillator. The oscillator is optimized for low
operating current consumption.
The actual frequency of the oscillator can be measured by
activating the MFR signal. An 8-bit counter will then be
reset and will start counting at the first rising edge of the
76.8 kHz signal and stop counting at the next rising edge
of the 76.8 kHz signal. The processor then can read the
contents of the MFR counter.
The processor can adjust the oscillator frequency using
the F0 to F4 signals (control of source current for ring
oscillator).
The 6 MHz oscillator is enabled by hardware only during
the start-up phase and whenever the DC/DC converter
needs the 6 MHz clock. In all other cases the 6 MHz
oscillator is switched of by hardware.
The DC/DC converter does not need the 6 MHz clock
when set in standby mode.
If the 6 MHz output is required as a frequency source for
other blocks (e.g. I
2
C-bus) the software needs to enable it
explicitly by setting ENB = 1. Besides the DC/DC
converter the following functions require the operation of
the 6 MHz oscillator:
I
2
C-bus block as basic time reference
Port output logic. Software commands that write to the
ports need this clock to complete the operation (if a
program ‘hangs’, this could be the problem).
Code fetching from external memories needs the clock
for the ALE/PSEN timing (e.g. LJMP 5000H needs this
clock for completion).
When the ENB bit has been set by software, the clock will
be available internally after the start-up time of this
oscillator. The start-up time is 2 to 3 periods of the
76.8 kHz reference frequency.
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