參數(shù)資料
型號(hào): PCA5010
廠商: NXP Semiconductors N.V.
英文描述: Pager baseband controller
中文描述: 傳呼機(jī)基帶控制器
文件頁(yè)數(shù): 13/112頁(yè)
文件大小: 627K
代理商: PCA5010
1998 Nov 02
13
Philips Semiconductors
Product specification
Pager baseband controller
PCA5010
Table 1
Special Function Registers Overview; note 1
ADDR
(HEX)
NAME
7
6
5
4
3
2
1
0
R/W
RESET
VALUE
COMMENT
80
81
82
83
87
88
89
8A
8B
8C
8D
90
92
93
94
95
96
98
99
9E
A0
A5
A8
B0
B8
C0
CD
CE
D0
D1
D2
D3
D4
D8
D9
DA
E0
E8
E9
P0
SP
DPL
DPH
PCON
TCON
TMOD
TL0
TL1
TH0
TH1
P1
TGCON
TG0
WUCON
WUC0
WUC1
S0CON
S0BUF
AFCON
P2
WDCON
IEN0/IE
P3
IP/IP0
IRQ1
RTCON
RTC0
PSW
DCCON0
DCCON1
OS6CON
OS6M0
S1CON
S1STA
S1DAT
ACC
IEN1
IX1
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
RW
R
RW
RW
RW
RW
9FH
07H
00H
00H
00H
00H
00H
00H
00H
00H
00H
FFH
00H
00H
00H
00H
00H
00H
00H
00H
FFH
00H
00H
C3H
00H
00H
00H
00H
00H
03H
00H
00H
00H
00H
78H
00H
00H
00H
00H
bit addressable
SMOD
TF1
GATE
XRE
TR1
C/T
ENIS
TF0
M1
GF1
IE1
GATE
GF0
IT1
C/T
PD
IE0
M1
IDL
IT0
M0
TR0
M0
bit addressable
bit addressable
ENB
CLK2
RUN
WUP
TEST
CPL
Z1
Z0
LOAD
SET
see note 2
see note 2
see note 2
bit addressable
SM0
SM1
REN
TB8
RB8
TI
RI
ENB
AFC5
AFC4
AFC3
AFC2
AFC1
AFC0
bit addressable
COND
EA
WD3
EWU
WD2
ES1
WD1
ES0
WD0
ET1
LD
EX0
EX1
ET0
bit addressable
bit addressable
bit addressable
bit addressable
see note 2
see note 2
bit addressable
PWU
IQ8
PS1
IQ7
PS0
IQ6
PT1
IQ5
PX1
IQ4
W/R
PT0
IQ3
LOAD
PX0
IQ2
SET
IQ9
MIN
CY
OFF
VBG1
ENB
AC
SBY
VBG0
F0
RXE
VLO1
SF4
RS1
SBLI
VLO0
SF3
RS0
SF2
OV
SF1
P
(3)
BLI
(3)
MFR
STB
(3)
SF0
ENS1
SC3
STA
SC2
STO
SC1
SI
AA
0
0
CR0
0
bit addressable
SC4
SC0
bit addressable
bit addressable
EMIN
IL9
EWD
IL8
EDC
IL7
EX6
IL6
ESC
IL5
EX4
IL4
EX3
IL3
EX2
IL2
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