參數(shù)資料
型號(hào)： PC8260VTPU200
廠商： Atmel Corp.
英文描述： PowerPC-based Communications Processors
中文描述： 基于PowerPC的通信處理器
文件頁(yè)數(shù)： 29/53頁(yè)
文件大小： 364K
代理商： PC8260VTPU200
29
PC8260PowerQUICCII
2131B–HIREL–02/03
L_A22
PCI_SERR
LocalBusAddress22
O
Inthelocaladdressbus,bit14ismostsignificantandbit31isleast
significant.
PCISystemError
I/O
AssertionofthispinindicatesthataPCIsystemerrorwasdetected
duringaPCItransfer.
L_A23
PCI_REQ0
LocalBusAddress23
O
Inthelocaladdressbus,bit14ismostsignificantandbit31isleast
significant.
PCIArbiterRequest0
I/O
WhenPowerQUICCII’sinternalPCIarbiterisused,thisisaninputpin.
InthismodeassertionofthispinindicatesthatanexternalPCIagentis
requestingthePCIbus.WhenanexternalPCIarbiterisused,thisisan
outputpin.InthismodeassertionofthispinindicatesthatPowerQUICC
II’sPCIinterfaceisrequestingthePCIbus.
L_A24
PCI_REQ1
LocalBusAddress24
O
Inthelocaladdressbus,bit14ismostsignificantandbit31isleast
significant.
PCIArbiterRequest1
I
WhenPowerQUICCII’sinternalPCIarbiterisused,assertionofthispin
indicatesthatanexternalPCIagentisrequestingthePCIbus.
L_A25
PCI_GNT0
LocalBusAddress25
O
Inthelocaladdressbus,bit14ismostsignificantandbit31isleast
significant.
PCIArbiterGrant0
I/O
WhenPowerQUICCII’sinternalPCIarbiterisused,thisisanoutputpin.
Inthismode,assertionofthispinindicatesthatanexternalPCIagent
thatrequestedthePCIbuswiththeREQ0pinisgrantedthebus.When
anexternalPCIarbiterisused,thisisaninputpin.Inthismode,
assertionofthispinindicatesthatPowerQUICCII’sPCIinterfaceis
grantedthePCIbus.
L_A26
PCI_GNT1
LocalBusAddress26
O
Inthelocaladdressbus,bit14ismostsignificantandbit31isleast
significant.
PCIArbiterGrant1
O
WhenPowerQUICCII’sinternalPCIarbiterisused,assertionofthispin
indicatesthattheexternalPCIagentthatrequestedthePCIbuswiththe
REQ1pinisgrantedthebus.
L_A27
CLKOUT
LocalBusAddress27
O
Inthelocaladdressbus,bit14ismostsignificantandbit31isleast
significant.
ClockOutputpin
O
InaPCIsystemwherePC8260’sPCIinterfaceisconfiguredtooperate
fromanexternalPCIclock,the60xbusclockisdrivenonCLKOUT.Ina
PCIsystemwherethePC8260’sPCIinterfaceisconfiguredtogenerate
thePCIclock,thePCIclockisdrivenonCLKOUT.ThePCIclock
frequencyrangeis25-66MHz.
L_A28
PCI_RST
CORE_SRESET
LocalBusAddress28
O
Inthelocaladdressbusbit14ismostsignificantandbit31isleast
significant.
PCIReset
I/O
WhenthePC8260isthehostinthePCIsystem,PCI_RSTisanoutput.
WhenthePC8260isnotthehostofthePCIsystem,PCI_RSTisan
input.
CoreSystemReset
I
Thisaninputtothecore.Whenthisinputpinisassertedthecore
branchestoitsresetvector.
Table4.
ExternalSignals(Continued)
Pin
SignalName
Type
Description
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