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參數(shù)資料
| 型號： | PC8260VTPU200 |
| 廠商： | Atmel Corp. |
| 英文描述： | PowerPC-based Communications Processors |
| 中文描述： | 基于PowerPC的通信處理器 |
| 文件頁數(shù)： | 23/53頁 |
| 文件大?。?/td> | 364K |
| 代理商： | PC8260VTPU200 |
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23
PC8260PowerQUICCII
2131B–HIREL–02/03
IRQ3
DP[3]
CKSTPOUT
EXTBR3
InterruptRequest3
I
Thisinputisoneoftheeightexternallinesthatcanrequest(bymeansof
theinternalinterruptcontroller)aserviceroutinefromthecore.
60xDataParity3
I/O
The60xagentthatdrivesthedatabus,alsodrivesthedataparity
signals.Thevaluedrivenonthedataparity3pinshouldprovideodd
parity(oddnumberof1’s)onthegroupofsignalsthatincludesdata
parity3andD[24:31].
CheckstopOutput
O
Assertionofthispinindicatesthatthecoreisinitscheckstopmode.
ExternalBusRequest3
I
Anexternalmastershouldassertthispintorequest60xbusownership
fromtheinternalarbiter.
IRQ4
DP[4]
CORESRESET
EXTBG3
InterruptRequest4
I
Thisinputisoneoftheeightexternallinesthatcanrequest(bymeansof
theinternalinterruptcontroller)aserviceroutinefromthecore.
60xDataParity4
I/O
The60xagentthatdrivesthedatabus,alsodrivesthedataparity
signals.Thevaluedrivenonthedataparity4pinshouldprovideodd
parity(oddnumberof1’s)onthegroupofsignalsthatincludesdata
parity4andD[32:39].
Coresystemreset
I
Assertingthispinwillforcethecoretobranchtoitsresetvector.
ExternalBusGrant3
O
ThePowerQUICCIIassertsthispintogrant60xdatabusownershipto
anexternalbusmaster.
IRQ5
DP[5]
TBEN
EXTDBG3
InterruptRequest5
I
Thisinputisoneoftheeightexternallinesthatcanrequest(bymeansof
theinternalinterruptcontroller)aserviceroutinefromthecore.
60xDataParity5
I/O
The60xagentthatdrivesthedatabus,alsodrivesthedataparity
signals.Thevaluedrivenonthedataparity5pinshouldprovideodd
parity(oddnumberof1’s)onthegroupofsignalsthatincludesdata
parity5andD[40:47].
TimeBaseEnable
I
ThisisacountenableinputtotheTimeBasecounterinthecore.
ExternalBusGrant3
O
ThePowerQUICCIIassertsthispintogrant60xdatabusownershipto
anexternalbusmaster.
IRQ6
DP[6]
CSE[0]
InterruptRequest6
I
Thisinputisoneoftheeightexternallinesthatcanrequest(bymeansof
theinternalinterruptcontroller)aserviceroutinefromthecore.
60xDataParity6
I/O
The60xagentthatdrivesthedatabus,alsodrivesthedataparity
signals.Thevaluedrivenonthedataparity6pinshouldprovideodd
parity(oddnumberof1’s)onthegroupofsignalsthatincludedataparity
6andD[48:55].
CacheSetEntry0
O
Thecachesetentryoutputsfromthecore,representthecache
replacementsetelementforthecurrentcoretransactionreloadinginto,
orwritingoutof,thecache.
IRQ7
DP[7]
CSE[1]
InterruptRequest7
I
Thisinputisoneoftheeightexternallinesthatcanrequest(bymeansof
theinternalinterruptcontroller)aserviceroutinefromthecore.
60xDataParity7
I/O
The60xmasterorslavethatdrivesthedatabus,alsodrivesthedata
paritysignals.Thevaluedrivenonthedataparity7pinshouldprovide
oddparity(oddnumberof1’s)onthegroupofsignalsthatincludedata
parity7andD[56:63].
CacheSetEntry1
O
Thecachesetentryoutputsfromthecore,representthecache
replacementsetelementforthecurrentcoretransactionreloadinginto,
orwritingoutof,thecache.
Table4.
ExternalSignals(Continued)
Pin
SignalName
Type
Description
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