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參數(shù)資料
| 型號(hào)： | ORT82G5-3BM680 |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 1296 CLBS, 380000 GATES, PBGA680 |
| 封裝： | PLASTIC, BGA-680 |
| 文件頁數(shù)： | 67/110頁 |
| 文件大?。?/td> | 1459K |
| 代理商： | ORT82G5-3BM680 |
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6
Lattice Semiconductor
Data Sheet
January 25, 2002
8b/10b SERDES Backplane Interface FPSC
ORCA ORT82G5 1.0-1.25/2.0-2.5/3.125-3.5 Gbits/s
Programmable Features (continued)
■
Built-in testability:
— Full boundary scan (IEEE 1149.1 and Draft
1149.2 JTAG).
— Programming and readback through boundary
scan port compliant to IEEE Draft 1532:D1.7.
— TS_ALL testability function to 3-state all I/O pins.
— New temperature-sensing diode.
■
Improved built-in clock management with program-
mable phase-locked loops (PPLLs) provide optimum
clock modication and conditioning for phase, fre-
quency, and duty cycle from 20 MHz up to 420 MHz.
Multiplication of the input frequency up to 64x and
division of the input frequency down to 1/64x possi-
ble.
■
New cycle stealing capability allows a typical 15% to
40% internal speed improvement after nal place
and route. This feature also enables compliance with
many setup/hold and clock to out I/O specications
and may provide reduced ground bounce for output
buses by allowing exible delays of switching output
buffers.
Programmable Logic System Features
■
PCI local bus compliant for FPGA I/Os.
■
Improved PowerPC 860 and PowerPC II high-
speed synchronous microprocessor interface can be
used for conguration, readback, device control, and
device status, as well as for a general-purpose inter-
face to the FPGA logic, RAMs, and embedded stan-
dard cell blocks. Glueless interface to synchronous
PowerPC processors with user-congurable address
space provided.
■
New embedded AMBA specication 2.0 AHB sys-
tem bus (ARM processor) facilitates communica-
tion among the microprocessor interface,
conguration logic, embedded block RAM, FPGA
logic, and embedded standard cell blocks.
■
Variable size bused readback of conguration data
capability with the built-in microprocessor interface
and system bus.
■
Internal, 3-state, and bidirectional buses with simple
control provided by the SLIC.
■
New clock routing structures for global and local
clocking signicantly increases speed and reduces
skew (<200 ps for OR4E4).
■
New local clock routing structures allow creation of
localized clock trees.
■
Two new edge clock routing structures allow up to six
high-speed clocks on each edge of the device for
improved setup/hold and clock to out performance.
■
New double-data rate (DDR) and zero-bus turn-
around (ZBT) memory interfaces support the latest
high-speed memory interfaces.
■
New 2x/4x uplink and downlink I/O capabilities inter-
face high-speed external I/Os to reduced speed
internal logic.
■
ORCA Foundry development system software. Sup-
ported by industry-standard CAE tools for design
entry, synthesis, simulation, and timing analysis.
■
Meets universal test and operations PHY interface
for ATM (UTOPIA) levels 1, 2, and 3; as well as POS-
PHY3. Also meets proposed specications for UTO-
PIA level 4 and POS-PHY3 (2.5 Gbits/s) and POS-
PHY4 (10 Gbits/s) interface standards for packet-
over-SONET as dened by the Saturn Group.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ORT82G5-3BM680C | 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORT82G5-3BM680C2 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:0.6 to 3.7 Gbps XAUI and FC FPSCs |
| ORT82G5-3F680C | 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 2.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORT82G5-3FN680C | 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 1.5V 3.7 G b Bpln Xcvr 643K Gt RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| ORT82G5-3FN680C1 | 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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