參數(shù)資料
型號: OL2300NHN
廠商: NXP SEMICONDUCTORS
元件分類: 通信及網(wǎng)絡
英文描述: Fractional-N PLL based transmitter
中文描述: SPECIALTY TELECOM CIRCUIT, PQCC16
封裝: 3 X 3 MM, 0.85 MM HEIGHT, LEAD FREE, PLASTIC, MO-220, SOT758-1, VQFN-16
文件頁數(shù): 7/46頁
文件大?。?/td> 951K
代理商: OL2300NHN
OL2300
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 28 October 2010
7 of 46
NXP Semiconductors
OL2300
Fractional-N PLL based transmitter
The power amplifier output (pin PAOUT) requires an external DC path to pin V
DD
,
established by the antenna loop or a dedicated bias coil. A dedicated ground pin (V
SS(PA)
)
is provided to improve the RF properties of the circuitry and must be connected to pin V
SS
.
Best efficiency is achieved when the output voltage swing at pin PAOUT yields one volt
less than two times the supply voltage:
(1)
Three special-function-registers ACON0, ACON1 and ACON2 are available to control the
output power of the 4 binary weighted output stages.
The Power amplifier also features three regulated and one unregulated (high power)
output power modes, as selected by the control bits PAM1 and PAM0 located in the
TXCON register. In regulated mode the input drive level of the amplifier is derived from an
internal reference voltage and so the output power is stabilized against supply voltage and
temperature variations over a wide range.
6.2 Transmitter operating modes
6.2.1
Power-down mode
If the EN pin is kept low for at least 2
16
XTAL clock pulses (~5 ms at a 13.08 MHz crystal
frequency), the transmitter (PLL, Power amplifier and crystal oscillator) will be reset, the
bitcounter inside the SPI counting the already transferred bits is set to zero, SCK and
SDIO are disabled (also SDO, if used) and the device will enter the power-down mode. In
this state the TXCON bit PLLEN is cleared. The total current consumption is almost zero.
Another possibility to enter the Power-down mode is to set the PD bit in the TXCON
register.
When the Power-down mode is left (by rising edge of EN) the PD bit is cleared.
6.2.2
XTAL active mode
With the rising edge of EN the Power-down mode is left and the crystal oscillator is
activated. The XTAL clock will be stable after t
set
. The SPI is activated, so the SFRs can
be programmed. The XTAL Active mode can be left by either activating the PLL (set
PLLEN in TXCON) or by entering the Power-down mode.
6.2.3
PLL active mode
If the XTAL active mode is active and the crystal oscillator is settled, the PLL can be
switched on (after t
set
). Setting the bit PLLEN in the register TXCON directly powers on
the PLL. The VCO output frequency will be stable after t
ACQ
. This mode stays active as
long as EN is kept 1 or as long as EN is kept 0 for a period shorter than 2
16
XTAL clock
pulses. If EN is kept 0 for a longer period or the PD bit in TXCON is set, the device returns
to the Power-down mode. By resetting the PLLEN bit in TXCON the PLL is turned off and
XTAL active mode is entered again. Another possibility to exit the PLL active mode is to
send a dedicated SPI command (transmit command).
6.2.4
Transmitter Active mode
The Transmitter Active mode can only be entered upon an SPI command, which is only
possible if the PLLEN bit is set (with a previous SPI command). Dependent on the
configuration coded into the transmit command, the Transmitter Active mode can be
V
PAOUT
(p-p)
2V
DDA
1
(
)
V
=
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