參數(shù)資料
型號: NT5DS64M8BF-6KI
廠商: NANYA TECHNOLOGY CORP
元件分類: DRAM
英文描述: DDR DRAM, PBGA60
封裝: 1 MM PITCH, WBGA-60
文件頁數(shù): 39/79頁
文件大?。?/td> 6238K
代理商: NT5DS64M8BF-6KI
NT5DS128M4BF
NT5DS128M4BT
NT5DS128M4BG
NT5DS128M4BS
NT5DS64M8BF
NT5DS64M8BT
NT5DS64M8BG
NT5DS64M8BS
NT5DS32M16BF
NT5DS32M16BT
NT5DS32M16BG
NT5DS32M16BS
512Mb DDR SDRAM
REV 1.3
11/2007
44
NANYA TECHNOLOGY CORP. All rights reserved.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
Write to Precharge: Minimum DQSS, Odd Number of Data (1 bit Write), Interrupting
(Burst Length = 4 or 8)
DI a-b = data in for bank a, column b.
An interrupted burst is shown, 1 data element is written.
tWR is referenced from the first positive CK edge after the last desired data in pair.
The Precharge command masks the last 2 data elements in the burst.
A10 is Low with the Write command (Auto Precharge is disabled).
1 = Can be don't care for programmed burst length of 4.
2 = For programmed burst length of 4, DQS becomes don't care at this point.
Don’t Care
T1
T2
T3
T4
T5
T6
NOP
PRE
Write
NOP
CK
Command
Address
BA a, COL b
BA (a or all)
tWR
tRP
DI a-b
DQS
DQ
tDQSS (min)
2
1
DM
3
4
3 = This bit is correctly written into the memory array if DM is low.
4 = These bits are incorrectly written into the memory array if DM is low.
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