參數(shù)資料
型號: NT5DS64M8BF-6KI
廠商: NANYA TECHNOLOGY CORP
元件分類: DRAM
英文描述: DDR DRAM, PBGA60
封裝: 1 MM PITCH, WBGA-60
文件頁數(shù): 6/79頁
文件大?。?/td> 6238K
代理商: NT5DS64M8BF-6KI
NT5DS128M4BF
NT5DS128M4BT
NT5DS128M4BG
NT5DS128M4BS
NT5DS64M8BF
NT5DS64M8BT
NT5DS64M8BG
NT5DS64M8BS
NT5DS32M16BF
NT5DS32M16BT
NT5DS32M16BG
NT5DS32M16BS
512Mb DDR SDRAM
REV 1.3
11/2007
14
NANYA TECHNOLOGY CORP. All rights reserved.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
Operating Mode
The normal operating mode is selected by issuing a Mode Register Set Command with bits A7-A12 to zero, and bits A0-A6 set
to the desired values. A DLL reset is initiated by issuing a Mode Register Set command with bits A7 and A9-A12 each set to
zero, bit A8 set to one, and bits A0-A6 set to the desired values. A Mode Register Set command issued to reset the DLL should
always be followed by a Mode Register Set command to select normal operating mode.
All other combinations of values for A7-A12 are reserved for future use and/or test modes. Test modes and reserved states
should not be used as unknown operation or incompatibility with future versions may result.
CAS Latencies
NOP
Read
CAS Latency = 2, BL = 4
Shown with nominal tAC, tDQSCK, and tDQSQ.
CK
Command
DQS
DQ
Don’t Care
CL=2
NOP
Read
CAS Latency = 2.5, BL = 4
CK
Command
DQS
DQ
CL=2.5
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