參數(shù)資料
型號： NT5DS64M8BF-6KI
廠商： NANYA TECHNOLOGY CORP
元件分類： DRAM
英文描述： DDR DRAM, PBGA60
封裝： 1 MM PITCH, WBGA-60
文件頁數(shù)： 21/79頁
文件大?。?/td> 6238K
代理商： NT5DS64M8BF-6KI
NT5DS128M4BF
NT5DS128M4BT
NT5DS128M4BG
NT5DS128M4BS
NT5DS64M8BF
NT5DS64M8BT
NT5DS64M8BG
NT5DS64M8BS
NT5DS32M16BF
NT5DS32M16BT
NT5DS32M16BG
NT5DS32M16BS
512Mb DDR SDRAM
REV 1.3
11/2007
28
NANYA TECHNOLOGY CORP. All rights reserved.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
Data from any Read burst may be truncated with a Burst Terminate command, as shown in timing figure entitled Terminating a
Read Burst: CAS Latencies (Burst Length = 8) on page 29. The Burst Terminate latency is equal to the read (CAS) latency, i.e.
the Burst Terminate command should be issued x cycles after the Read command, where x equals the number of desired data
element pairs.
Data from any Read burst must be completed or truncated before a subsequent Write command can be issued. If truncation is
necessary, the Burst Terminate command must be used, as shown in timing figure entitled Read to Write: CAS Latencies (Burst
Length = 4 or 8) on page 30. The example is shown for tDQSS(min). The tDQSS(max) case, not shown here, has a longer bus idle
time. tDQSS(min) and tDQSS(max) are defined in the section on Writes.
A Read burst may be followed by, or truncated with, a Precharge command to the same bank (provided that Auto Precharge
was not activated). The Precharge command should be issued x cycles after the Read command, where x equals the number of
desired data element pairs (pairs are required by the 2n prefetch architecture). This is shown in timing figure Read to Pre-
charge: CAS Latencies (Burst Length = 4 or 8) on page 31 for Read latencies of 2 and 2.5. Following the Precharge command,
a subsequent command to the same bank cannot be issued until tRP is met. Note that part of the row precharge time is hidden
during the access of the last data elements.
In the case of a Read being executed to completion, a Precharge command issued at the optimum time (as described above)
provides the same operation that would result from the same Read burst with Auto Precharge enabled. The disadvantage of the
Precharge command is that it requires that the command and address busses be available at the appropriate time to issue the
command. The advantage of the Precharge command is that it can be used to truncate bursts.
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