參數(shù)資料
型號： MX53L06402L-50
廠商： MACRONIX INTERNATIONAL CO LTD
元件分類： PROM
英文描述： FLASH 2.7V PROM CARD, XMA7
封裝： CRAD-7
文件頁數(shù)： 18/55頁
文件大小： 262K
代理商： MX53L06402L-50
25
P/N: PM1043
REV. 1.0, NOV. 25, 2003
MX53L06402
6.8 Clock Control
The bus frequency can be changed at any time (under the restrictions of masimum data trandfer frequency, defined
by the cards, and the identification frequency defined by the specification document).
It is an obvious requirement that the clock must be running for the card to output data or response tokens. After the
last MultiMediaCard bus transaction, the host is required, to provide 8(eight) clock cycles for the card to complete the
operation before shutting down the clock. Following is a list of the various bus transactions:
A command with no response. 8 clocks after the host command end bit.
A command with response. 8 clocks after the card response end it.
A read data transaction. 8 clocks after the end bit of the last data block.
6.9 Error Conditions
6.9.1 CRC and Illegal Command
All commands are protected by CRC (cyclic redundancy check) bits. If the addressed card's CRC check fails, the card
does not respond and the command is not executed. The card does not change its state, and COM_CRC_ERROR
bit is set in the status register.
Similarly, if an illegal command has been received, a card shall not change its state, shall not response and shall set
the ILLEGAL_COMMAND error bit in the status register. Only the non-erroneous state branches are shown in the state
diagrams (see Figure 4 and Figure 5). Table 17 contains a complete state transition description.
There are different kinds of illegal commands:
Commands which belong to classes not supported by the card (e.g. write commands in read only cards).
Commands not allowed in the current state (e.g. CMD2 in Transfer State).
Commands which are not defined (e.g. CMD6).
6.9.2 Read Time-out Conditions
The times after which a time-out condition for read operations occurs are (card independent) 10 times longer than the
typical access times for these operations given below. A card shall complete the command within this time period, or
give up and return an error message. If the host does not get a response within the defined time-out it should assume
the card is not going to respond anymore and try to recover (e.g. reset the card, power cycle, reject, etc.). The typical
access times are defined as follows:
Read
The read access time is defined as the sum of the two times given by the CSD parameters TAAC and NSAC (see
Chapter 6.7). These card parameters define the typical delay between the end bit of the read command and the start
bit of the data block. This number is card dependent and should be used by the host to calculate throughput and the
maximal frequency for stream read.
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