參數(shù)資料
型號(hào)： MX53L06402L-50
廠商： MACRONIX INTERNATIONAL CO LTD
元件分類： PROM
英文描述： FLASH 2.7V PROM CARD, XMA7
封裝： CRAD-7
文件頁(yè)數(shù)： 16/55頁(yè)
文件大?。?/td> 262K
代理商： MX53L06402L-50
23
P/N: PM1043
REV. 1.0, NOV. 25, 2003
MX53L06402
There is a two Z bit period followed by P bits pushed up by the responding card. The following tim-ing diagram is
relevant for all host commands followed by a response, except CMD1, CMD2 and CMD3:
S
T
content
CRC
E
CMD
Host command
NCR cycles
Response
S
T
content
CRC
E
Z
* * *
ZP
P
Z
Figure 7: Command response timing (data transfer mode)
Card identification and card operation conditions timing
The card identification (CMD2) and card operation conditions (CMD1) timing are processed in the open-drain mode.
The card response to the host command starts after exactly NID clock cycles.
S
T
content
CRC
E
CMD
Host command
NID cycles
CID or OCR
ST
content
Z
* * * * * *
Z
Figure 8: Identification timing (card identification mode)
Last card response - next host command timing
After receiving the last card response, the host can start the next command transmission after at least N
RC clock cycles.
This timing is relevant for any host command.
S
T
content
CRC
E
CMD
Response
NRC cycles
Host command
S
T
content
CRC
E
Z
* * * * * *
Z
Figure 9: Timing response end to next CMD start (data transfer mode)
Last host command - next host command timing diagram
After the last command, which does not force a response, has been sent, the host can continue sending the next
command after at least N
CC clock periods.
Figure 10: Timing CMD
n end to CMD n+1 start (all modes)
In the case the CMD
n command was a last identification command (no more response sent by a card), then the next
CMD
n+1 command is allowed to follow after at least N CC +136 (the length of the R2 response) clock periods.
S
T
content
CRC
E
CMD
Host command
NCC cycles
Host command
S
T
content
CRC
E
Z
* * * * * *
Z
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